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ED - Mid Lecture-10

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0% found this document useful (0 votes)
20 views20 pages

ED - Mid Lecture-10

Uploaded by

omurabuyousuf
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Electronic Devices

Mid Term
Lecture - 10

Faculty Name: Susmita Ghosh


Email : [email protected]

Reference book:
Electronic Devices and Circuit Theory (Chapter-4)
Robert L. Boylestad and L. Nashelsky , (11th Edition)

Faculty of Engineering
American International University-Bangladesh
Objectives

• Be able to determine the dc levels for the variety of important BJT configurations.

• Understand how to measure the important voltage levels of a BJT transistor


configuration and use them to determine whether the network is operating properly.

• Become aware of the saturation and cutoff conditions of a BJT network and the
expected voltage and current levels established by each condition.

• Be able to perform a load-line analysis of the most common BJT configurations.

• Become acquainted with the design process for BJT amplifiers.

• Understand the basic operation of transistor switching networks.

• Begin to understand the troubleshooting process as applied to BJT configurations.

• Develop a sense for the stability factors of a BJT configuration and how they affect its
operation due to changes in specific characteristics and environmental changes.

Faculty of Engineering
American International University-Bangladesh
EMITTER-BIAS CONFIGURATION

Adding a resistor in the


Emitter circuit stabilizes the
bias circuit.

Faculty of Engineering
American International University-Bangladesh
BIAS STABILITY

• If VBE is held constant and the temperature rises, the current through the base-
emitter diode IB will increase, and thus the collector IC will also increase. The
power dissipated in the transistor may also increase, which will further
increase its temperature and exacerbate the problem. This deleterious positive
feedback results in thermal runaway.

• Adding RE to the Emitter improves the stability of a transistor.

• Stability refers to a bias circuit in which the currents and voltages will remain
fairly constant for a while range of temperatures and transistor Beta’s (β).

• VRB = VCC – IERE – VBE

Faculty of Engineering
American International University-Bangladesh
BIAS STABILITY

• If temperature increases, emitter current increases.

• However, a larger IE increases the emitter voltage VE =IERE, which in turn


reduces the voltage VRB across the base resistor.

• A lower base-resistor voltage drop reduces the base current, which results in
less collector current because IC = βIB.

Faculty of Engineering
American International University-Bangladesh
BASE–EMITTER LOOP

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American International University-Bangladesh
BASE–EMITTER LOOP

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American International University-Bangladesh
COLLECTOR–EMITTER LOOP

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American International University-Bangladesh
EXAMPLE

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American International University-Bangladesh
EXAMPLE

Faculty of Engineering
American International University-Bangladesh
VOLTAGE-DIVIDER BIAS CONFIGURATION
• The bias current 𝐼𝐶𝑄 and voltage 𝑉𝐶𝐸𝑄 is a function of the current gain β
of the transistor
• Since β is temperature sensitive, especially for silicon transistors, it
would be desirable to develop a bias circuit that is independent of, the
transistor β.

The voltage-divider bias configuration is such a network.

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American International University-Bangladesh
EXACT ANALYSIS

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American International University-Bangladesh
EXAMPLE

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American International University-Bangladesh
EXAMPLE CONTD.

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Approximate Analysis

𝑅𝑖 = (β + 1) 𝑅𝐸 ≅ β𝑅𝐸

Faculty of Engineering
American International University-Bangladesh
EXAMPLE

Faculty of Engineering
American International University-Bangladesh
COLLECTOR FEEDBACK CONFIGURATION
• An improved level of stability can also be obtained by introducing a feedback path
from collector to base
• Although the Q-point is not totally independent of beta (even under approximate
conditions), the sensitivity to changes in beta or temperature variations is normally less
than encountered for the fixed-bias or emitter-biased configurations.
• The analysis will again be performed by first analyzing the base–emitter loop, with the
results then applied to the collector–emitter loop

Faculty of Engineering
American International University-Bangladesh
BASE–EMITTER LOOP

Faculty of Engineering
American International University-Bangladesh
COLLECTOR–EMITTER LOOP

EXAMPLE 4.12

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American International University-Bangladesh
Thank You

Faculty of Engineering
American International University-Bangladesh

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