UNIT -2
MICROPROGRAMMED CONTROL:
Control memory
A control memory is a part of the control unit. Any computer that involves micro
programmed control consists of two memories. They are the main memory and the
control memory. Programs are usually stored in the main memory by the users.
Whenever the programs change, the data is also modified in the main memory. They
consist of machine instructions and data.
The control memory consists of micro programs that are fixed and cannot be modified
frequently. They contain microinstructions that specify the internal control signals
required to execute register micro-operations.
The machine instructions generate a chain of microinstructions in the control memory.
Their function is to generate micro-operations that can fetch instructions from the main
memory, compute the effective address, execute the operation and return control to
fetch phase and continue the cycle.
The Control memory address register specifies the address of the micro-
instruction.
The Control memory is assumed to be a ROM within which all control
information is permanently stored.
The control register holds the microinstruction fetched from the memory.
The micro-instruction contains a control word that specifies one or more
micro-operations for the data processor.
While the micro-operations are being executed the next address is
computed in the next address generator circuit and then transferred into
the control address register to read the next microinstruction.
The next address generator is often referred to as a micro-program
sequencer, as it determines the address sequence that is read from
control memory.
Addressing Sequencing
The control memory is used to store the microinstructions in groups. Here each
group is used to specify a routine. The control memory of each computer has the
instructions which contain their micro-programs routine. These micro-programs are
used to generate the micro-operations that will be used to execute the instructions.
Suppose the address sequencing of control memory is controlled by the hardware.
On the basis of the status bit conditions, the address sequencing selects
the conditional branch or unconditional branch.
Addressing sequence is able to increment the CAR (Control address
register).
It provides the facility for subroutine calls and returns.
A mappings process is provided by the addressing sequence from the
instructions bits to a control memory address.
MI
MICRO PROGRAM EXAMPLE program example micro program example micro
program example micro program example micro program example
Once the configuration of a computer and its micro programmed
control unit is established, the designer's task is to generate the
microcode foe the control memory.
This code generation is called micro programming and is a process
similar to conventional machine language programming.
Design of Control Unit
The Control Unit is classified into two major categories:
1. Hardwired Control
2. Microprogrammed Control
Hardwired Control
The Hardwired Control organization involves the control logic to be
implemented with gates, flip-flops, decoders, and other digital circuits.
The following image shows the block diagram of a Hardwired Control
organization.
General Register Organization
A set of flip-flops forms a register. A register is a unique high-speed storage area in the
CPU. They include combinational circuits that implement data processing. The
information is always defined in a register before processing. The registers speed up
the implementation of programs.
Registers implement two important functions in the CPU operation are as follows −
It can support a temporary storage location for data. This supports the directly
implementing programs to have fast access to the data if required.
It can save the status of the CPU and data about the directly implementing
program.
.
The CPU bus system is managed by the control unit. The control unit explicit the data
flow through the ALU by choosing the function of the ALU and components of the
system.
Consider R1 ← R2 + R3, the following are the functions implemented within the CPU −
MUX A Selector (SELA) − It can place R2 into bus A.
MUX B Selector (SELB) − It can place R3 into bus B.
ALU Operation Selector (OPR) − It can select the arithmetic addition (ADD).
Decoder Destination Selector (SELD) − It can transfers the result into R1.
Instruction formats refer to the way instructions are encoded and
represented in machine language.
There are several types of instruction formats, including zero, one, two, and
three-address instructions.
Zero-address instructions: These instructions do not specify any operands or
addresses. Instead, they operate on data stored in registers or memory
locations implicitly defined by the instruction.
1. One-address instructions: These instructions specify one operand or
address, which typically refers to a memory location or register. The
instruction operates on the contents of that operand, and the result may be
stored in the same or a different location. For example, a one-address
instruction might load the contents of a memory location into a register. Zero
Address Instructions –
A stack-based computer does not use the address field in the instruction. To
evaluate an expression first it is converted to reverse Polish Notation i.e. Postfix
Notation.
Expression: X = (A+B)*(C+D)
Postfixed : X = AB+CD+*
TOP means top of stack
M[X] is any memory location
2 .One Address Instructions –
This uses an implied ACCUMULATOR register for data manipulation. One
operand is in the accumulator and the other is in the register or memory
location. Implied means that the CPU already knows that one operand is in the
accumulator so there is no need to specify it.
3.Two Address Instructions –
This is common in commercial computers. Here two addresses can be specified
in the instruction. Unlike earlier in one address instruction, the result was stored
in the accumulator, here the result can be stored at different locations rather
than just accumulators, but require more number of bit to represent address.
4.Three Address Instructions –
This has three address field to specify a register or a memory location. Program
created are much short in size but number of bits per instruction increase.
These instructions make creation of program much easier but it does not mean
that program will run much faster because now instruction only contain more
information but each micro operation (changing content of register, loading
address in address bus etc.) will be performed in one cycle only.
Addressing Modes
Addressing Modes– The term addressing modes refers to the way in
which the operand of an instruction is specified. The addressing mode
specifies a rule for interpreting or modifying the address field of the
instruction before the operand is actually executed.
Addressing modes for 8086 instructions are divided into two
categories:
1) Addressing modes for data
2) Addressing modes for branch
The 8086 memory addressing modes provide flexible access to
memory, allowing you to easily access variables, arrays, records,
pointers, and other complex data types. The key to good assembly
language programming is the proper use of memory addressing
modes.
An assembly language program instruction consists of two parts
The memory address of an operand consists of two components:
IMPORTANT TERMS
Starting address of memory segment.
Effective address or Offset: An offset is determined by adding
any combination of three address elements: displacement, base
and index.
Displacement: It is an 8 bit or 16 bit immediate value
given in the instruction.
Base: Contents of base register.
Index: Content of index register SI .
According to different ways of specifying an operand by 8086
microprocessor, different addressing modes are used by 8086.
Addressing modes used by 8086 microprocessor are discussed
below:
Implied mode:: In implied addressing the operand is specified in
the instruction itself. In this mode the data is 8 bits or 16 bits long
and data is the part of instruction.Zero address instruction are
designed with implied addressing mode.
Example: used to reset Carry flag to 0
Immediate addressing mode (symbol #):In this mode data is
present in address field of instruction .Designed like one address
instruction format.
Note:Limitation in the immediate mode is that the range of
constants are restricted by size of address field.
Example: MOV AL, 35H (move the data 35H into AL register)
Register mode: In register addressing the operand is placed in one
of 8 bit or 16 bit general purpose registers. The data is in the
register that is specified by the instruction.
Here one register reference is required to access the data.
Example: MOV AX,CX (move the contents of CX register to AX
register)
Register Indirect mode: In this addressing the operand’s offset is
placed in any one of the registers BX,BP,SI,DI as specified in the
instruction. The effective address of the data is in the base register
or an index register that is specified by the instruction.
Here two register reference is required to access the data.
The 8086 CPUs let you access memory indirectly through a register
using the register indirect addressing modes.
MOV AX, [BX](move the contents of memory location s
addressed by the register BX to the register AX)
Auto Indexed (increment mode): Effective address of the
operand is the contents of a register specified in the instruction.
After accessing the operand, the contents of this register are
automatically incremented to point to the next consecutive memory
location.(R1)+.
Here one register reference,one memory reference and one ALU
operation is required to access the data.
Example:
Add R1, (R2)+ // OR
R1 = R1 +M[R2]
R2 = R2 + d
Useful for stepping through arrays in a loop. R2 – start of array d –
size of an element
Auto indexed ( decrement mode): Effective address of the
operand is the contents of a register specified in the instruction.
Before accessing the operand, the contents of this register are
automatically decremented to point to the previous consecutive
memory location. –(R1)
Here one register reference,one memory reference and one ALU
operation is required to access the data.
Example:
Add R1,-(R2) //OR
R2 = R2-d
R1 = R1 + M[R2]
Auto decrement mode is same as auto increment mode. Both can also
be used to implement a stack as push and pop . Auto increment and
Auto decrement modes are useful for implementing “Last-In-First-Out”
data structures.
Direct addressing/ Absolute addressing Mode (symbol
[ ]): The operand’s offset is given in the instruction as an 8 bit or 16
bit displacement element. In this addressing mode the 16 bit
effective address of the data is the part of the instruction.
Here only one memory reference operation is required to access the
data.
Example:ADD AL,[0301]
Indirect addressing Mode (symbol @ or () ):In this mode
address field of instruction contains the address of effective
address.Here two references are required.
1st reference to get effective address.
2nd reference to access the data.
Based on the availability of Effective address, Indirect mode is of
two kind:
1. Register Indirect:In this mode effective address is in the register, and
corresponding register name will be maintained in the address field of an
instruction.
Here one register reference,one memory reference is required to access the
data.
2. Memory Indirect:In this mode effective address is in the memory, and
corresponding memory address will be maintained in the address field of an
instruction.
Data Manipulation Instructions
Data Manipulation Instructions Data manipulation instructions perform
operations on data and provide computational capabilities for the computer. The
data manipulation instructions in a typical computer are usually divided into
three basic types as follows.
1. Arithmetic instructions
2. Logical and bit manipulation instructions
3. Shift instructions
Let’s discuss them one by one.
1. Arithmetic instructions: The four basic operations are addition,
subtraction, multiplication, and division. Most computers provide instructions
for all four operations.
2. Logical and Bit Manipulation Instructions: Logical instructions perform
binary operations on strings of bits stored in registers. They are helpful for
manipulating individual bits or a group of bits.
3. Shift Instructions: Shifts are operations in which the bits of a word are
moved to the left or right. Shift instructions may specify either logical shifts,
arithmetic shifts, or rotate-type operations.