CA3089

November 1996 FM IF System

Features Description
• For FM IF Amplifier Applications in High-Fidelity, Intersil CA3089 is a monolithic integrated circuit that pro-
Automotive, and Communications Receivers vides all the functions of a comprehensive FM-IF system.
• Includes: IF Amplifier, Quadrature Detector, AF The block diagram shows the CA3089 features, which
Preamplifier, and Specific Circuits for AGC, AFC, Muting include a three-stage FM-IF amplifier/limiter configuration
(Squelch), and Tuning Meter with level detectors for each stage, a doubly-balanced
quadrature FM detector and an audio amplifier that features
• Exceptional Limiting Sensitivity
the optional use of a muting (squelch) circuit.
at -3dB Point . . . . . . . . . . . . . . . . . . . . . . . . . . 12µV (Typ)
• Low Distortion: The advanced circuit design of the IF system includes desir-
(with Double-Tuned Coil). . . . . . . . . . . . . . . . 0.1% (Typ) able deluxe features such as delayed AGC for the RF tuner,
and AFC drive circuit, and an output signal to drive a tuning
• Single-Coil Tuning Capability meter and/or provide stereo switching logic. In addition, inter-
• High Recovered Audio. . . . . . . . . . . . . . . . 400mV (Typ) nal power supply regulators maintain a nearly constant cur-
rent drain over the voltage supply range of +8.5V to +16V.
• Provides Specific Signal for Control of Interchannel
Muting (Squelch) The CA3089 is ideal for high-fidelity operation. Distortion in a
• Provides Specific Signal for Direct Drive of a Tuning CA3089 FM-IF System is primarily a function of the phase
Meter linearity characteristic of the outboard detector coil.

• Provides Delayed AGC Voltage for RF Amplifier

• Provides a Specific Circuit for Flexible AFC
• Internal Supply-Voltage Regulators

Ordering Information
PART NUMBER TEMP. PKG.
(BRAND) RANGE (oC) PACKAGE NO.
CA3089E -40 to 85 16 Ld PDIP E16.3
CA3089M1 -40 to 85 20 Ld SOIC M20.3
(3089M)

Pinout
CA3089 CA3089
(PDIP) (SOIC)
TOP VIEW TOP VIEW

GND 1 20 GND
IF IN 1 16 NC IF IN 2 19 DELAYED AGC
INPUT BYPASS 2 15 DELAYED AGC INPUT BYPASS 3 18 GND
DC FB BYPASS 3 14 SUBSTRATE (GND) DC FB BYPASS 4 17 SUBSTRATE (GND)
FRAME GND 4 13 TUNING METER OUT FRAME GND 5 16 TUNING METER OUT
MUTE CONTROL 5 12 MUTE LOGIC MUTE CONTROL 6 15 MUTE LOGIC

AUDIO OUT 6 11 V+ AUDIO OUT 7 14 V+

AFC OUT 7 10 REF BIAS AFC OUT 8 13 REF BIAS

IF OUT 9 12 QUADRATURE INPUT
IF OUT 8 9 QUADRATURE INPUT
GND 10 11 NC

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. File Number 561.3
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
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 CA3089

Absolute Maximum Ratings Thermal Information

Supply Voltage Thermal Resistance (Typical, Note 1) θJA (oC/W)
Between V+ and Frame GND . . . . . . . . . . . . . . . . . . . . . . . . . 16V PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
Between V+ and Substrate GND . . . . . . . . . . . . . . . . . . . . . . 16V SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
DC Current (Out of Delayed AGC) . . . . . . . . . . . . . . . . . . . . . . . 2mA Maximum Junction Temperature (Plastic Package) . . . . . . . . 150oC
Operating Conditions Maximum Storage Temperature Range . . . . . . . . . -65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC (SOIC - Lead Tips Only)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θJA is measured with the component mounted on an evaluation PC board in free air.

Electrical Specifications V+ = 12V (See Figures 3 and 4)

(NOTE 3) TEMP.
PARAMETER TEST CONDITIONS (oC) MIN TYP MAX UNITS
DC CHARACTERISTICS
Quiescent Circuit Current No signal input, Non muted 25 16 23 30 mA
DC Voltages Terminal 1 (IF Input) 25 1.2 1.9 2.4 V
Terminal 2 (AC Return to Input) 25 1.2 1.9 2.4 V
Terminal 3 (DC Bias to Input) 25 1.2 1.9 2.4 V
Terminal 6 (Audio Output) 25 5.0 5.6 6.0 V
Terminal 10 (DC Reference) 25 5.0 5.6 6.0 V
DYNAMIC CHARACTERISTICS
Input Limiting Voltage (-3dB point), V1 (lim) - fO = 10.7MHz, 25 - 12 25 µV
AM Rejection (Terminal 6), AMR VIN = 0.1V, fMOD = 400Hz, 25 45 55 - dB
AM Mod. = 30% Deviation = ±75kHz
Recovered AF Voltage (Terminal 6) VO (AF) VIN = 0.1V 25 300 400 500 mV
Total Harmonic Single Tuned (Terminal 6) 25 - 0.5 1.0 %
Distortion, THD Double Tuned (Terminal 6) 25 - 0.1 - %
(Note 2)
Signal Plus Noise to Noise Ratio (Terminal 6) 25 60 67 - dB
NOTES:
2. THD characteristics are essentially a function of the phase characteristics of the network connected between Terminals 8, 9, and 10.
3. Terminal numbers refer to 16 Lead PDIP.

Application Information
RECOVERED AUDIO (dB) MUTING CONTROL

V+ = 12V, TA 25oC
5kΩ V+ = 12V, TA = 25oC
125 10 7
0 6
µA
AT MAXIMUM RESISTANCE
CURRENT INTO TERMINAL 7 (µA)

100 RECOVERED AUDIO FROM FULL OUTPUT

-10 (LEFT COORDINATE) 5
75
50
-20 TUNER AGC DC VOLTAGE AT 4
DC (V)

25 TERM. 15 (RIGHT COORDINATE)

0 -30 VOLTAGE AT TERMINAL 13 3
METER CIRCUIT (33kΩ TO GND)
-25 (RIGHT COORDINATE)
-40 2
-50
-75 -50 1
-100
-125 -60
-100 -50 0 50 100 1 10 100 1K 10K 100K
CHANGE IN FREQUENCY (kHz) INPUT SIGNAL (µV)

FIGURE 1. AFC CHARACTERISTICS (CURRENT AT TERMINAL FIGURE 2. MUTING ACTION, TUNER AGC, AND TUNING
7) vs CHANGE IN FREQUENCY. (SEE TEST CIRCUIT METER OUTPUT vs INPUT SIGNAL VOLTAGE. (SEE
FIGURE 3.) TEST CIRCUIT FIGURE 3.)

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 CA3089

Test Circuits
3K

100
L pF
(NOTE 5)
V+ = 12V C1
22µH C 5K
T (NOTE 8)
100 V+ = 12V
0.05µF 11 22µH C2 5K
8 pF

9 0.05µF 11 100
SIGNAL 0.01µF 3.9K pF
8
INPUT 1
VOLTAGE 10 SIGNAL 0.01µF 9
7 AFC OUTPUT 8.2K
51 INPUT 1
2.7K AUDIO VOLTAGE 10
3 CA3089E 6 51 7 AFC OUTPUT
OUT
0.01 12 2.7K AUDIO
µF 5 0.01 3 6
CA3089E
0.02 µF OUT
µF 2 13 470 0.01 12 0.01
0.001 µF 5 µF
15 µF 0.02
µF 2 13 470
14 0.001 0.33µF 0.001
µF 120K
4 15 µF
10 33K
K 14 0.001 0.33µF
0.5M µF 120K
150µA 4
10 33K
FULL K
TUNING METER SCALE 0.5M
150µA
FULL
TUNING METER SCALE
NOTES: NOTES:
4. All resistance values are in ohms. 7. All resistance values are in ohms.
5. L tunes with 100pF (C) at 10.7MHz. 8. T PRI. - Q0 (unloaded) ≅ 75 (tunes with 100pF (C1) 20↑ of 34e on
7/ ” dia. form).
6. Q0 (unloaded) ≅ 75 (G.I. Automatic Mfg. Div. EX22741 or equivalent). 32
9. SEC. - Q0 (unloaded) ≅ 75 (tunes with 100pF (C2) 20↑ of 34e on
7/ ” dia. form).
32
10. kQ (percent of critical coupling) ≅ 70%.
(Adjusted for coil voltage VC) = 150mV.
Above values permit proper operation of mute (squelch) circuit “E”
type slugs, spacing 4mm.
FIGURE 3. TEST CIRCUIT FOR CA3089E USING A SINGLE- FIGURE 4. TEST CIRCUIT FOR CA3089E USING A DOUBLE-
TUNED DETECTOR COIL TUNED DETECTOR COIL

Typical Applications

L (NOTE 14)
V+ = 12V 100pF
100
C
0.01µF 0.05µF 22
µH
11 3.9K
220pF 250pF 8
1 9
300Ω FM CERAMIC 10
INPUT IF OUT FILTER 330 2.7K
TUNER AUDIO
(NOTE 12) (NOTE 13) 3 CA3089E
CA3089E 6
OUT
0.01µF
2
14
NOTES: 4
11. All resistance values are in ohms.
12. Waller 4SN3FIC or equivalent.
13. Murata SFG 10.7mA or equivalent.
Performance Data at fO = 98MHz, fMOD = 400Hz, Deviation = ±75kHz:
14. L tunes with 100pF (C) at 10.7MHz Q0 unloaded ≅ 75
(G.I. EX22741 or equivalent). -3dB Limiting Sensitivity . . . . . . . . . . . . . . . . . . 2µV (Antenna Level)
20dB Quieting Sensitivity . . . . . . . . . . . . . . . . . 1µV (Antenna Level)
30dB Quieting Sensitivity . . . . . . . . . . . . . . . . 1.5µV (Antenna Level)

FIGURE 5. TYPICAL FM TUNER USING THE CA3089E WITH A SINGLE TUNED DETECTOR COIL

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 CA3089

Typical Applications (Continued)

FIGURE 6A. BOTTOM VIEW OF PRINTED CIRCUIT BOARD FIGURE 6B. COMPONENT SIDE - TOP VIEW

FIGURE 6. ACTUAL SIZE PHOTOGRAPHS OF THE CA3089E AND OUTBOARD COMPONENTS MOUNTED ON A PRINTED-CIRCUIT BOARD

Block Diagram
L
(NOTE 16)
QUADRATURE
INPUT
V+ 22µH
C=
100pF

TO INTERNAL 11 IF REFERENCE
8 9 10
REGULATORS OUT BIAS

IF IF AMPLIFIER AFC AFC

7
INPUT AMPL. OUTPUT
1ST IF 2ND IF 3RD IF QUADRATURE
1 AMPL. AMPL. AMPL. DETECTOR AUDIO
AUDIO
6
AMPL. OUTPUT
3
0.02 0.02µF AUDIO MUTING
µF MUTE
2 LEVEL LEVEL LEVEL LEVEL SENSITIVITY
(SQUELCH) 5
DETECTOR DETECTOR DETECTOR DETECTOR
CONTROL
DELAYED AMPL.
AGC FOR
RF AMPL
TUNING 470 120K
15 MUTE (SQUELCH)
METER 12
DRIVE CIRCUIT
CIRCUIT 500K
10K FRAME SUBSTRATE 0.33µF

150µA TO STEREO
4 14 13
METER THRESHOLD
33K TUNING METER OUTPUT LOGIC CIRCUITS

NOTES:
15. All resistance values are in ohms.
16. L Tunes with 100pF (C) at 10.7MHz.
17. QO ≅ 75 (G.I. EX22741 or equivalent).
18. Pin numbers refer to 16 lead DIP.

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 CA3089

Schematic Diagram

IF AMPLIFIER
Q9 Q15
A Q21

R18 R19 Q22 R27

C 2K R23 750
R6 R7 R10 R11 2K
2K
2K 2K 2K 2K
R24
C11 C12 C13 C14 480
1 1 1 1
B R25
1.5K

V+

V+ V+
Q3 Q4
C1
1 Q19
Q20
Q8 Q7 Q14 Q13 R28
C2 R20
1 750
Q8A Q7A Q14A Q13A 2K
IF
INPUT Q11 Q16Q17
Q10 R16A R21
1 Q1 Q2 R12A R15A
R13A 2K 480
2K 2K
2K
Q18 R22 SEE
Q12
2 C3 R16 1.5K NEXT
0.2 2.7K
Q6 R13 R14 R12 R15 PAGE
R17
2.7K 360 2.7K 2.7K
INPUT R2 360
BYPASSING 30K C4
R3
0.2
360

3
R1
30K

V+
V+
Q74
R50 R51 R59 R60
500 5K 150 300
C6 C7 C8
C5 3
Q58 2 3 3
Q61 Q64 Q68 Q75 Q77

Q60 Q63 Q69 Q84

Q59 Q62 Q70 Q76

R52 R53 R56 R61

400 600 600 4K

AGC FOR TUNING

15 13 METER
RF AMPL.

NOTE: Pin numbers refer to 16 lead PDIP.

LEVEL DETECTOR AND METER CIRCUIT

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 CA3089

Schematic Diagram (Continued)

9 QUADRATURE REF 10 8 IF 11 V+
INPUT BIAS OUT

DETECTOR AUDIO
R33 R32 AMPLIFIER
500 500 R37 R38 R44 R42
166 500 500 166
Q35
Q23
Q44 Q46 Q53 Q51
Q24 Q25 Q32 Q33 R31
390
Q45 A Q54
R26 R34
10K 10K

R40 R41
Q26 Q34 500 500
R63 R64
300 300
Q48 Q49
Q39 Q79 Q81
Q38
Q50

Q80
R35 AUDIO
D2 D3 2.2K OUT
Q40 Q82
R49 6
5K
Q27 Q41
Q83
R29 R36
200 200 V+

R65
5
R9 R45 R39 R43 50K MUTE
10K Q28 V+ 500 500 500 CONTROL
Q5
Q30
A Q47 Q52
Z1 Q31
R8 Q29 Q43
C D4
2K
Q42
AFC
B R30 D5 R54 OUTPUT
R5 480
4K 5K R46 7
Z2 Q56
R55 4.2K
D1 13K

R4 Q55 Q57
480 Q65
Q66 BIAS R47 R48
Q67 SUPPLY 500 500
AFC AMPLIFIER

R57 R62
C9
10K V+
10 4 FRAME 14 SUBSTRATE
Q71 500
Q78
Q72
Q73
C10
10 R58 NOTES:
50 19. All resistance values are in ohms.
MUTE
12
LOGIC 20. All capacitance values are in pF.
21. Pin numbers refer to 16 lead PDIP.
MUTE DRIVE

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 CA3089

All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate
and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which
may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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