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Simulation 01

The document outlines a laboratory experiment on basic logic gates, including INVERTER, AND, and OR gates, conducted by a group of students at Universiti Teknologi Mara. It details the objectives, results, and discussions related to the function of these gates using a logic circuit simulator and truth tables. Additionally, it includes questions and answers regarding the logic equations and characteristics of the gates.

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2023635428
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22 views6 pages

Simulation 01

The document outlines a laboratory experiment on basic logic gates, including INVERTER, AND, and OR gates, conducted by a group of students at Universiti Teknologi Mara. It details the objectives, results, and discussions related to the function of these gates using a logic circuit simulator and truth tables. Additionally, it includes questions and answers regarding the logic equations and characteristics of the gates.

Uploaded by

2023635428
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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Marks

UNIVERSITI TEKNOLOGI MARA


CAWANGAN SARAWAK

PHY 310
MODERN PHYSICS

TITLE : BASIC LOGIC GATES…………………….

EXP. NO : SIMULATION 1

GROUP : A4AS1204/A….

NAME : MUHAMMAD ADIB BIN SHEFRI [LEADER]

GROUP MEMBER
NO NAME STUDENT ID

1 RACHEAL DERRIE ANAK FRANCIS 2023864438

2 NATASHA LIPANG BENNET 2023450972

3 MUHAMMAD ADIB AKMAL BIN SHEFRI 2023635428

DATE OF SUBMISSION: 21 APRIL 2025 [ MONDAY]

LECTURER : PROFESOR MADYA DR. ROBIN CHANG YEE HUI

1|Page
Title Basic Logic Gates
Experiment

No. Of Simulation 1
Experiment

Objective To study the function of basic logic gates INVERTER, AND,


OR and gate conversion using logic circuit simulator and
truth table representation.

Results And Part A:


Discussion INVERTER (NOT), AND GATE, and OR GATE

i. INVERTER (NOT)

ii. AND GATE

iii. OR GATE

2|Page
Results:
Truth Table for INVERTER (NOT), AND GATE, and OR GATE

Part B:
Gate Conversions

3|Page
Results:
Truth Table for Figure 1.2 and Figure 1.3

Questions 1. The output of an AND gate will be high if BOTH of its inputs is /
are high.

2. The output of an OR gate will be low if NONE of its inputs are


high.

3. The logic equation for a 3-input AND gate shown below is


X=ABC

4. The logic equation for a 4-input OR gate shown below is


X=A+B+C+D

5. The output of the logic circuit shown below X=𝐴̅

6. The NAND GATE is formed by inverting the inputs and output of


an AND gate.

7. The NOR GATE is formed by inverting the inputs and output for
an AND gate.

4|Page
8. The power supply voltage for TTL ICs is typically 5 volts(s).

9. Draw the outputs waveform of the gates shown below.


a.

5|Page
b.

6|Page

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