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RT8293B

3A, 23V, 1.2MHz Synchronous Step-Down Converter

General Description Features
The RT8293B is a high efficiency, monolithic synchronous  ±1.5% High Accuracy Feedback Voltage
step-down DC/DC converter that can deliver up to 3A  4.5V to 23V Input Voltage Range
output current from a 4.5V to 23V input supply. The  3A Output Current
RT8293B's current mode architecture and external  Integrated N-MOSFET Switches
compensation allow the transient response to be  Current Mode Control
optimized over a wide range of loads and output capacitors.  Fixed Frequency Operation : 1.2MHz
Cycle-by-cycle current limit provides protection against  Adjustable Output from 0.8V to 15V
shorted outputs and soft-start eliminates input current  Up to 95% Efficiency
surge during start-up. The RT8293B provides output under  Programmable Soft-Start
voltage protection and thermal shutdown protection. The  Stable with Low ESR Ceramic Output Capacitors
low current (<3μA) shutdown mode provides output  Cycle-by-Cycle Over Current Protection
disconnect, enabling easy power management in battery-  Input Under Voltage Lockout
powered systems. The RT8293B is available in a  Output Under Voltage Protection
SOP-8 (Exposed Pad) package.  Thermal Shutdown Protection
 RoHS Compliant and Halogen Free
Ordering Information
RT8293B Applications
Package Type  Wireless AP/Router
SP : SOP-8 (Exposed Pad-Option 1)
 Set-Top-Box
Lead Plating System
 Industrial and Commercial Low Power Systems
G : Green (Halogen Free and Pb Free)
Z : ECO (Ecological Element with  LCD Monitors and TVs
Halogen Free and Pb free)  Green Electronics/Appliances
H : UVP Hiccup  Point of Load Regulation of High-Performance DSPs
L : UVP Latch-Off
Note : Pin Configurations
Richtek products are : (TOP VIEW)
 RoHS compliant and compatible with the current require-
BOOT 8 SS
ments of IPC/JEDEC J-STD-020. VIN 2 7 EN
 Suitable for use in SnPb or Pb-free soldering processes. GND
SW 3 6 COMP
9
GND 4 5 FB

SOP-8 (Exposed Pad)

Marking Information
RT8293BxGSP RT8293BxZSP
RT8293BxGSP : Product Number RT8293BxZSP : Product Number
RT8293Bx x : H or L RT8293Bx x : H or L
GSPYMDNN ZSPYMDNN
YMDNN : Date Code YMDNN : Date Code

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RT8293B
Typical Application Circuit
VIN 2 1
VIN BOOT
4.5V to 23V CIN CBOOT L
10µF x 2 RT8293B 100nF 3.6µH
VOUT
SW 3
3.3V/3A
REN 100k 7 EN R1
75k
8 SS COUT
FB 5 22µF x 2
CSS CC RC
2.2nF R2
0.1µF 4, 9 (Exposed Pad) 6 22k 24k
GND COMP

CP
Open

Table 1. Recommended Component Selection

VOUT (V) R1 (k) R2 (k) RC (k) CC (nF) L (H) COUT (F)
8 27 3 51 2.2 10 22 x 2
5 62 11.8 33 2.2 6.8 22 x 2
3.3 75 24 22 2.2 3.6 22 x 2
2.5 25.5 12 16 2.2 3.6 22 x 2
1.5 10.5 12 10 2.2 2 22 x 2
1.2 12 24 8.2 2.2 2 22 x 2
1 3 12 6.8 2.2 2 22 x 2

Functional Pin Description

Pin No. Pin Name Pin Function
Bootstrap for High Side Gate Driver. Connect a 0.1F or greater ceramic
1 BOOT
capacitor from BOOT to SW pins.
Input Supply Voltage, 4.5V to 23V. Must bypass with a suitably large ceramic
2 VIN
capacitor.
3 SW Switch Node. Connect this pin to an external L-C filter.
4, Ground. The exposed pad must be soldered to a large PCB and connected to
GND
9 (Exposed Pad) GND for maximum power dissipation.
Feedback Input. This pin is connected to the converter output. It is used to set
the output of the converter to regulate to the desired value via an internal
5 FB
resistive divider. For an adjustable output, an external resistive divider is
connected to this pin.
Compensation Node. COMP is used to compensate the regulation control
6 COMP loop. Connect a series RC network from COMP to GND. In some cases, an
additional capacitor from COMP to GND is required.
Chip Enable (Active High). A logic low forces the RT8293B into shutdown
7 EN mode reducing the supply current to less than 3A. Attach this pin to VIN with
a 100k pull up resistor for automatic startup.
Soft-Start Control Input. SS controls the soft-start period. Connect a capacitor
8 SS from SS to GND to set the soft-start period. A 0.1F capacitor sets the
soft-start period to 13.5ms.

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 RT8293B
Function Block Diagram

VIN

Internal
Regulator Oscillator
Current Sense
Shutdown Slope Comp Amplifier
Comparator VA VCC + VA
Foldback
1.2V + Control -
-
0.4V + BOOT
Lockout -
Comparator UV S Q 85m
5k Comparator SW
EN - +
R Q 85m
2.7V + -
3V Current GND
Comparator
VCC

6µA
0.8V +
SS +EA
-

FB COMP

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RT8293B
Absolute Maximum Ratings (Note 1)
 Supply Voltage, VIN ------------------------------------------------------------------------------------------------- −0.3V to 25V
 Input Voltage, SW --------------------------------------------------------------------------------------------------- −0.3V to (VIN + 0.3V)
 VBOOT − VSW ---------------------------------------------------------------------------------------------------------- −0.3V to 6V
 All Other Pin Voltages --------------------------------------------------------------------------------------------- −0.3V to 6V
 Power Dissipation, PD @ TA = 25°C

SOP-8 (Exposed Pad) --------------------------------------------------------------------------------------------- 1.333W

Package Thermal Resistance (Note 2)

SOP-8 (Exposed Pad), θJA ---------------------------------------------------------------------------------------- 75°C/W

SOP-8 (Εxposed Pad), θJC --------------------------------------------------------------------------------------- 15°C/W
 Lead Temperature (Soldering, 10 sec.) ------------------------------------------------------------------------- 260°C
 Junction Temperature ----------------------------------------------------------------------------------------------- 150°C
 Storage Temperature Range -------------------------------------------------------------------------------------- −65°C to 150°C
 ESD Susceptibility (Note 3)

HBM (Human Body Mode) ---------------------------------------------------------------------------------------- 2kV

MM (Machine Mode) ------------------------------------------------------------------------------------------------ 200V

Recommended Operating Conditions (Note 4)

 Supply Voltage, VIN ------------------------------------------------------------------------------------------------- 4.5V to 23V
 Junction Temperature Range -------------------------------------------------------------------------------------- −40°C to 125°C
 Ambient Temperature Range -------------------------------------------------------------------------------------- −40°C to 85°C

Electrical Characteristics
(VIN = 12V, TA = 25°C, unless otherwise specified)
Parameter Symbol Test Conditions Min Typ Max Unit
Shutdown Supply Current VEN = 0V -- 0.5 3 A
Supply Current VEN = 3V, VFB = 0.9V -- 0.8 1.2 mA
Feedback Voltage VFB 4.5V  VIN  23V 0.788 0.8 0.812 V
Error Amplifier
GEA IC = ±10A -- 940 -- A/V
Transconductance
High Side Switch
RDS(ON)1 -- 85 -- m
On-Resistance
Low Side Switch
RDS(ON)2 -- 85 -- m
On-Resistance
High Side Switch Leakage
VEN = 0V, VSW = 0V -- 0 10 A
Current
High Side Switch Current Limit Min. Duty Cycle, BOOTVSW = 4.8V -- 5.1 -- A
Low Side Switch Current Limit From Drain to Source -- 1.5 -- A
COMP to Current Sense
GCS -- 5.4 -- A/V
Transconductance
Oscillation Frequency FOSC1 1 1.2 1.4 MHz
Short Circuit Oscillation
FOSC2 VFB = 0V -- 270 -- kHz
Frequency
Maximum Duty Cycle DMAX VFB = 0.7V -- 75 -- %
Minimum On-Time tON -- 100 -- ns

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 RT8293B
Parameter Symbol Conditions Min Typ Max Unit
EN Threshold Logic-High VIH 2.7 -- 5.5
V
Voltage Logic-Low VIL -- -- 0.4
Input Under Voltage Lockout
VIN Rising 3.8 4.2 4.5 V
Threshold
Input Under Voltage Lockout
-- 320 -- mV
Hysteresis
Soft-Start Current VSS = 0V -- 6 -- A
Soft-Start Period CSS = 0.1F -- 13.5 -- ms
Thermal Shutdown TSD -- 150 -- C

Note 1. Stresses listed as the above "Absolute Maximum Ratings" may cause permanent damage to the device. These are for
stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended
periods may remain possibility to affect device reliability.
Note 2. θJA is measured in natural convection at TA = 25°C on a high effective thermal conductivity four-layer test board of
JEDEC 51-7 thermal measurement standard. The measurement case position of θJC is on the exposed pad of the
package.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.

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RT8293B
Typical Operating Characteristics
Efficiency vs. Output Current Reference Voltage vs. Input Voltage
100 0.820
90 0.815
80

Reference Voltage (V)

0.810
70 VIN = 12V
Efficiency (%)

VIN = 23V 0.805

60
50 0.800
40 0.795
30
0.790
20
0.785
10
VOUT = 3.3V
0 0.780
0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3 4 6 8 10 12 14 16 18 20 22 24
Output Current (A) Input Voltage (V)

Reference Voltage vs. Temperature Output Voltage vs. Output Current

0.820 3.36
3.35
0.815
3.34
Reference Voltage (V)

0.810 3.33
Output Voltage (V)

3.32
0.805
3.31
0.800 3.30 VIN = 23V
3.29 VIN = 12V
0.795
3.28
0.790 3.27
3.26
0.785
3.25
VOUT = 3.3V
0.780 3.24
-50 -25 0 25 50 75 100 125 0.0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3.0
Temperature (°C) Output Current (A)

Switching Frequency vs. Input Voltage Switching Frequency vs. Temperature

1.40 1.40
Switching Frequency (MHz)1

Switching Frequency (MHz)1

1.35 1.35

1.30 1.30

1.25 1.25

1.20 1.20

1.15 1.15

1.10 1.10

1.05 1.05
VOUT = 3.3V, IOUT = 0.5A VIN = 12V, VOUT = 3.3V, IOUT = 0.5A
1.00 1.00
4 6 8 10 12 14 16 18 20 22 24 -50 -25 0 25 50 75 100 125
Input Voltage (V) Temperature (°C)

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 RT8293B

Output Current Limit vs. Input Voltage Current Limit vs. Temperature
6 8

5 7
Output Current Limit (A)

Current Limit (A)

4 VOUT = 1.2V 6
VOUT = 3.3V (Add Bootstrap Diode)
VOUT = 3.3V
3 5

2 4

1 3

VIN = 12V, VOUT = 3.3V

0 2
4 6 8 10 12 14 16 18 20 22 24 -50 -25 0 25 50 75 100 125
Input Voltage (V) Temperature (°C)

Load Transient Response Load Transient Response

VOUT VOUT
(100mV/Div) (100mV/Div)

IOUT IOUT
(2A/Div) (2A/Div)
VIN = 12V, VOUT = 3.3V, IOUT = 0A to 3A VIN = 12V, VOUT = 3.3V, IOUT = 1.5A to 3A

Time (100μs/Div) Time (100μs/Div)

Switching Switching

VOUT VOUT
(5mV/Div) (5mV/Div)

VSW VSW
(10V/Div) (10V/Div)

IL IL
(2A/Div) (2A/Div)
VIN = 12V, VOUT = 3.3V, IOUT = 3A VIN = 12V, VOUT = 3.3V, IOUT = 1.5A

Time (0.5μs/Div) Time (0.5μs/Div)

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RT8293B

Power On from VIN Power Off from VIN

VIN VIN
(5V/Div) (5V/Div)
VOUT VOUT
(2V/Div) (2V/Div)

IL IL
(2A/Div) (2A/Div)

VIN = 12V, VOUT = 3.3V, IOUT = 3A VIN = 12V, VOUT = 3.3V, IOUT = 3A

Time (5ms/Div) Time (5ms/Div)

Power On from EN Power Off from EN

VEN VEN
(5V/Div) (5V/Div)

VOUT VOUT
(2V/Div) (2V/Div)

IL IL
(2A/Div) (2A/Div)

VIN = 12V, VOUT = 3.3V, IOUT = 3A VIN = 12V, VOUT = 3.3V, IOUT = 3A

Time (5ms/Div) Time (5ms/Div)

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 RT8293B
Application Information
The RT8293B is a synchronous high voltage buck converter Soft-Start
that can support an input voltage range from 4.5V to 23V The RT8293B contains an external soft-start clamp that
and the output current can be up to 3A. gradually raises the output voltage. The soft-start timing
can be programmed by the external capacitor between
Output Voltage Setting
SS pin and GND. The chip provides a 6μA charge current
The resistive voltage divider allows the FB pin to sense
for the external capacitor. If 0.1μF capacitor is used to
the output voltage as shown in Figure 1.
set the soft-start, it's period will be 13.5ms (typ.).
VOUT
Chip Enable Operation
R1 The EN pin is the chip enable input. Pulling the EN pin
FB low (<0.4V) will shutdown the device. During shutdown
RT8293B R2 mode, the RT8293B quiescent current will drop below 3μA.
GND Driving the EN pin high (>2.7V, < 5.5V) will turn on the
device again. For external timing control (e.g.RC), the EN
Figure 1. Output Voltage Setting pin can also be externally pulled high by adding a REN*
resistor and C EN * capacitor from the VIN pin
The output voltage is set by an external resistive voltage (see Figure 5).
divider according to the following equation :
An external MOSFET can be added to implement digital
VOUT = VFB  1 R1  control on the EN pin when no system voltage above 2.5V
 R2  is available, as shown in Figure 3. In this case, a 100kΩ
Where VFB is the feedback reference voltage (0.8V typ.). pull-up resistor, REN, is connected between VIN and the
EN pin. MOSFET Q1 will be under logic control to pull
External Bootstrap Diode down the EN pin.
Connect a 100nF low ESR ceramic capacitor between 2 1
VIN VIN BOOT
CIN CBOOT VOUT
the BOOT pin and SW pin. This capacitor provides the REN RT8293B
100k L
gate driver voltage for the high side MOSFET. 7 EN SW 3
Chip Enable
R1 COUT
It is recommended to add an external bootstrap diode Q1

8 SS FB 5
between an external 5V and BOOT pin for efficiency
CSS 4, CC RC R2
improvement when input voltage is lower than 5.5V or duty 9 (Exposed Pad) COMP
6
GND CP
cycle is higher than 65% .The bootstrap diode can be a
low cost one such as IN4148 or BAT54. The external 5V
can be a 5V fixed input from system or a 5V output of the
Figure 3. Enable Control Circuit for Logic Control with
RT8293B. Note that the external boot voltage must be
Low Voltage
lower than 5.5V.
5V
To prevent enabling circuit when VIN is smaller than the
VOUT target value, a resistive voltage divider can be placed
between the input voltage and ground and connected to
BOOT
the EN pin to adjust IC lockout threshold, as shown in
RT8293B 100nF
Figure 4. For example, if an 8V output voltage is regulated
SW
from a 12V input voltage, the resistor REN2 can be selected
to set input lockout threshold larger than 8V.
Figure 2. External Bootstrap Diode

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 RT8293B
VIN 2 1
VIN BOOT VOUT equation :
12V CIN
REN1 10µF RT8293B CBOOT 8V  VOUT   VOUT 
100k L L =
f   I   1  VIN(MAX) 
7 EN SW 3  L(MAX)   
REN2 R1 COUT The inductor's current rating (caused a 40°C temperature
8 SS FB 5 rising from 25°C ambient) should be greater than the
CSS 4, CC RC R2 maximum load current and its saturation current should
6
9 (Exposed Pad) COMP
GND CP
be greater than the short circuit peak current limit. Please
see Table 2 for the inductor selection reference.
Table 2. Suggested Inductors for Typical
Figure 4. The Resistors can be Selected to Set IC
Application Circuit
Lockout Threshold
Hiccup Mode Component Dimensions
Series
Supplier (mm)
For the RT8293BH, it provides Hiccup Mode Under Voltage
TDK VLF10045 10 x 9.7 x 4.5
Protection (UVP). When the FB voltage drops below half
TDK SLF12565 12.5 x 12.5 x 6.5
of the feedback reference voltage, VFB, the UVP function
TAIYO
will be triggered and the RT8293BH will shut down for a NR8040 8x8x4
YUDEN
period of time and then recover automatically. The Hiccup
CIN and COUT Selection
Mode UVP can reduce input current in short-circuit
conditions. The input capacitance, C IN, is needed to filter the
trapezoidal current at the source of the high side MOSFET.
Latch Off Mode To prevent large ripple current, a low ESR input capacitor
For the RT8293BL, it provides Latch Off Mode Under sized for the maximum RMS current should be used. The
Voltage Protection (UVP). When the FB voltage drops RMS current is given by :
below half of the feedback reference voltage, VFB, the UVP V VIN
IRMS = IOUT(MAX) OUT 1
VIN VOUT
will be triggered and the RT8293BL will shut down in Latch
Off Mode. In shutdown condition, the RT8293BL can be This formula has a maximum at VIN = 2VOUT, where
reset by EN pin or power input VIN. I RMS = I OUT/2. This simple worst-case condition is
commonly used for design because even significant
Inductor Selection deviations do not offer much relief.
The inductor value and operating frequency determine the Choose a capacitor rated at a higher temperature than
ripple current according to a specific input and output required. Several capacitors may also be paralleled to
voltage. The ripple current ΔIL increases with higher VIN meet size or height requirements in the design.
and decreases with higher inductance.
For the input capacitor, two 10μF low ESR ceramic
IL =  OUT   1 OUT 
V V
capacitors are recommended. For the recommended
 f L   VIN 
capacitor, please refer to Table 3 for more detail.
Having a lower ripple current reduces not only the ESR
losses in the output capacitors but also the output voltage The selection of COUT is determined by the required ESR
ripple. High frequency with small ripple current can achieve to minimize voltage ripple.
highest efficiency operation. However, it requires a large Moreover, the amount of bulk capacitance is also a key
inductor to achieve this goal. for COUT selection to ensure that the control loop is stable.
For the ripple current selection, the value of ΔIL = 0.24(IMAX) Loop stability can be checked by viewing the load transient
will be a reasonable starting point. The largest ripple response as described in a later section.
current occurs at the highest VIN. To guarantee that the The output ripple, ΔVOUT , is determined by :
VOUT  IL ESR  
ripple current stays below the specified maximum, the 1
inductor value should be chosen according to the following  8fCOUT 
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 RT8293B
The output ripple will be highest at the maximum input Checking Transient Response

voltage since ΔIL increases with input voltage. Multiple The regulator loop response can be checked by looking
capacitors placed in parallel may be needed to meet the at the load transient response. Switching regulators take
ESR and RMS current handling requirement. Dry tantalum, several cycles to respond to a step in load current. When
special polymer, aluminum electrolytic and ceramic a load step occurs, VOUT immediately shifts by an amount
capacitors are all available in surface mount packages. equal to ΔILOAD (ESR) also begins to charge or discharge
Special polymer capacitors offer very low ESR value. COUT generating a feedback error signal for the regulator
However, it provides lower capacitance density than other to return VOUT to its steady-state value. During this
types. Although Tantalum capacitors have the highest recovery time, VOUT can be monitored for overshoot or
capacitance density, it is important to only use types that ringing that would indicate a stability problem.
pass the surge test for use in switching power supplies.
EMI Consideration
Aluminum electrolytic capacitors have significantly higher
ESR. However, it can be used in cost-sensitive applications Since parasitic inductance and capacitance effects in PCB
for ripple current rating and long term reliability circuitry would cause a spike voltage on the SW pin when
considerations. Ceramic capacitors have excellent low high side MOSFET is turned-on/off, this spike voltage on
ESR characteristics but can have a high voltage coefficient SW may impact on EMI performance in the system. In
and audible piezoelectric effects. The high Q of ceramic order to enhance EMI performance, there are two methods
capacitors with trace inductance can also lead to significant to suppress the spike voltage. One is to place an R-C
ringing. snubber between SW and GND and make them as close
as possible to the SW pin (see Figure 5). Another method
Higher values, lower cost ceramic capacitors are now
is adding a resistor in series with the bootstrap
becoming available in smaller case sizes. Their high ripple
capacitor, CBOOT. But this method will decrease the driving
current, high voltage rating and low ESR make them ideal
capability to the high side MOSFET. It is strongly
for switching regulator applications. However, care must
recommended to reserve the R-C snubber during PCB
be taken when these capacitors are used at input and
layout for EMI improvement. Moreover, reducing the SW
output. When a ceramic capacitor is used at the input
trace area and keeping the main power in a small loop will
and the power is supplied by a wall adapter through long
be helpful on EMI performance. For detailed PCB layout
wires, a load step at the output can induce ringing at the
guide, please refer to the section of Layout Consideration.
input, VIN. At best, this ringing can couple to the output
and be mistaken as loop instability. At worst, a sudden
inrush of current through the long wires can potentially
cause a voltage spike at VIN large enough to damage the
part.
RBOOT*
VIN 2 1
VIN BOOT
4.5V to 23V CIN CBOOT
RT8293B L
REN* 10µF x 2 100nF 3.6µH VOUT
Chip Enable SW 3
7 EN 3.3V/3A
RS*
CEN* R1 COUT
CS * 75k 22µFx2
8 SS
FB 5
CSS 4, CC
0.1µF 9 (Exposed Pad) RC R2
2.2nF 22k
GND 6 24k
COMP

CP
* : Optional NC
Figure 5. Reference Circuit with Snubber and Enable Timing Control
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RT8293B
Thermal Considerations derating curves allows the designer to see the effect of
For continuous operation, do not exceed the maximum rising ambient temperature on the maximum power
operation junction temperature 125°C. The maximum dissipation allowed.
power dissipation depends on the thermal resistance of 2.2
Four-Layer PCB
IC package, PCB layout, the rate of surroundings airflow 2.0

and temperature difference between junction to ambient. 1.8

Power Dissipation (W)

The maximum power dissipation can be calculated by 1.6 Copper Area
1.4 70mm2
following formula : 50mm2
1.2 30mm2
PD(MAX) = (TJ(MAX) − TA ) / θJA 1.0 10mm2
Min.Layout
Where T J(MAX) is the maximum operation junction 0.8

temperature , TA is the ambient temperature and the θJA is 0.6

0.4
the junction to ambient thermal resistance.
0.2
For recommended operating conditions specification of 0.0
RT8293B, the maximum junction temperature is 125°C. 0 25 50 75 100 125
The junction to ambient thermal resistance θJA is layout Ambient Temperature (°C)
dependent. For PSOP-8 package, the thermal resistance
Figure 7. Derating Curves for RT8293B Package
θJA is 75°C/W on the standard JEDEC 51-7 four-layer
thermal test board. The maximum power dissipation at
TA = 25°C can be calculated by following formula :
P D(MAX) = (125°C − 25°C) / (75°C/W) = 1.333W
(min.copper area PCB layout)
P D(MAX) = (125°C − 25°C) / (49°C/W) = 2.04W
(70mm2copper area PCB layout)
(a) Copper Area = (2.3 x 2.3) mm2, θJA = 75°C/W
The thermal resistance θJA of SOP-8 (Exposed Pad) is
determined by the package architecture design and the
PCB layout design. However, the package architecture
design had been designed. If possible, it's useful to
increase thermal performance by the PCB layout copper
design. The thermal resistance θJA can be decreased by
adding copper area under the exposed pad of SOP-8
(Exposed Pad) package.
(b) Copper Area = 10mm2, θJA = 64°C/W
As shown in Figure 6, the amount of copper area to which
the SOP-8 (Exposed Pad) is mounted affects thermal
performance. When mounted to the standard
SOP-8 (Exposed Pad) pad (Figure 6a.), θJA is 75°C/W.
Adding copper area of pad under the SOP-8 (Exposed
Pad) (Figure 6b.) reduces the θJA to 64°C/W. Even further,
increasing the copper area of pad to 70mm2 (Figure 6e.)
reduces the θJA to 49°C/W.
(c) Copper Area = 30mm2 , θJA = 54°C/W
The maximum power dissipation depends on operating
ambient temperature for fixed T J(MAX) and thermal
resistance θJA. For RT8293B package, the Figure 7. of
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 RT8293B

(d) Copper Area = 50mm2 , θJA = 51°C/W (e) Copper Area = 70mm2 , θJA = 49°C/W
Figure 6. Themal Resistance vs. Copper Area Layout Design

Layout Consideration
For best performance of the RT8293B, the follow layout guidelines must be strictly followed.
 Input capacitor must be placed as close to the IC as possible.
 SW should be connected to inductor by wide and short trace. Keep sensitive components away from this trace.
 The feedback components must be connected as close to the device as possible
GND VIN SW GND The feedback components
must be connected as close
CIN to the device as possible.
Input capacitor must CSS CC
be placed as close
BOOT 8 SS
to the IC as possible. REN VIN
VIN 2 7 EN CP RC
GND
RS* CS* SW 3 6 COMP
9 R1
GND 4 5 FB
COUT
R2
L VOUT
SW should be connected to inductor by
wide and short trace. Keep sensitive
VOUT components away from this trace. GND

Figure 8. PCB Layout Guide

Table 3. Suggested Capacitors for CIN and COUT

Location Component Supplier Part No. Capacitance (F) Case Size
CIN MURATA GRM31CR61E106K 10 1206
CIN TDK C3225X5R1E106K 10 1206
CIN TAIYO YUDEN TMK316BJ106ML 10 1206
COUT MURATA GRM31CR60J476M 47 1206
COUT TDK C3225X5R0J476M 47 1210
COUT MURATA GRM32ER71C226M 22 1210
COUT TDK C3225X5R1C22M 22 1210

Copyright © 2016 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.

DS8293B-04 October 2016 www.richtek.com

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RT8293B
Outline Dimension
H
A

EXPOSED THERMAL PAD Y

(Bottom of Package)
J X B

C
I
D

Dimensions In Millimeters Dimensions In Inches

Symbol
Min Max Min Max
A 4.801 5.004 0.189 0.197
B 3.810 4.000 0.150 0.157
C 1.346 1.753 0.053 0.069
D 0.330 0.510 0.013 0.020
F 1.194 1.346 0.047 0.053
H 0.170 0.254 0.007 0.010
I 0.000 0.152 0.000 0.006
J 5.791 6.200 0.228 0.244
M 0.406 1.270 0.016 0.050
X 2.000 2.300 0.079 0.091
Option 1
Y 2.000 2.300 0.079 0.091
X 2.100 2.500 0.083 0.098
Option 2
Y 3.000 3.500 0.118 0.138

8-Lead SOP (Exposed Pad) Plastic Package

Richtek Technology Corporation

14F, No. 8, Tai Yuen 1st Street, Chupei City
Hsinchu, Taiwan, R.O.C.
Tel: (8863)5526789

Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should
obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot
assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be
accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries.
www.richtek.com DS8293B-04 October 2016
14