Digital Electronics
Digital Electronics
DIGITAL ELECTRONICS
1. Number Systems
A number system is a way to represent and express numbers using a specific set of symbols
and rules. In digital electronics, number systems are crucial because computers and digital
circuits operate using different number representations, especially binary (0s and 1s).
1. Decimal Number System
The decimal number system (also called the Base-10 system) is the most commonly used
number system in our daily life. It consists of ten digits (0,1,2,3,4,5,6,7,8,9).
Characteristics of the Decimal Number System:
1. Base (Radix): 10
2. Digits Used: 0, 1, 2, 3, 4, 5, 6, 7, 8, 9
3. Place Value System: Each digit in a decimal number has a place value based on
powers of 10.
4. Example:
5. Applications:
o Used in everyday calculations
o Used in financial transactions
o Base system for higher-level mathematical computations
2. Binary to Decimal
1101
+ 1011
--------
11000 (Result)
2. Binary Subtraction
Uses borrow, similar to decimal subtraction.
1101
- 1001
--------
0100 (Result)
3. Binary Multiplication
Uses repeated addition.
101
× 11
--------
101
+ 1010
10 |1010
-10
---
01
- 0
---
10
- 10
---
00
0111
• 1011
10010 (Ignore carry, result: 0010)
4. **Final Result**: **2₁₀**
2. Logic Gates
Logic gates are fundamental building blocks of digital circuits. They perform logical
operations on binary inputs (0s and 1s) and produce a binary output. Each gate follows a
specific truth table, which defines its function.
1. Basic Logic Gates
These are the fundamental gates used in digital electronics: AND, OR, and NOT.
1.1 AND Gate
• The AND gate outputs 1 (HIGH) only if all inputs are 1; otherwise, it outputs 0 (LOW).
• It follows the logical multiplication rule: A · B = Output
• Symbol:
A ---| & |--- Output
B ---| |
• Truth Table:
A B Output (A · B)
0 0 0
0 1 0
1 0 0
1 1 1
A B Output (A + B)
0 0 0
0 1 1
1 0 1
1 1 1
A Output (A')
0 1
1 0
2. Universal Gates
Universal gates can be used to create any other gate (AND, OR, NOT, XOR, etc.). The two
universal gates are NAND and NOR.
2.1 NAND Gate (NOT AND)
• The NAND gate is the opposite of the AND gate; it produces 0 only when all inputs
are 1, otherwise, it produces 1.
• It follows the rule: (A · B)'
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• Symbol:
A ---| & |o--- Output
B ---| |
• Truth Table:
A B Output (A · B)'
0 0 1
0 1 1
1 0 1
1 1 0
A B Output (A + B)'
0 0 1
0 1 0
1 0 0
1 1 0
3. Exclusive Gates
Exclusive gates include XOR (Exclusive OR) and XNOR (Exclusive NOR), which are used in
logic circuits and arithmetic operations.
3.1 XOR Gate (Exclusive OR)
• The XOR gate outputs 1 if the inputs are different (A ≠ B) and 0 if they are the same.
• It follows the rule: A ⊕ B = A'B + AB'
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• Symbol:
A ---|⊕|--- Output
B ---| |
• Truth Table:
A B Output (A ⊕ B)
0 0 0
0 1 1
1 0 1
1 1 0
A B Output (A ⊕ B)'
0 0 1
0 1 0
1 0 0
1 1 1
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Here are some important aspects of logic gate implementation:
1. Using NAND and NOR as Universal Gates
o Any logic function can be implemented using only NAND or NOR gates.
o Example: NOT Gate using NAND → Connect both inputs of NAND together to
get a NOT operation.
2. Combinational Logic Circuits
o These circuits use logic gates to perform tasks without memory.
o Examples: Adders, Encoders, Decoders, Multiplexers, and Demultiplexers.
3. Sequential Logic Circuits
o These circuits use logic gates with memory elements (Flip-Flops).
o Examples: Registers, Counters, and Memory Units.
3. Boolean Algebra
Boolean algebra is a branch of algebra that deals with binary variables and logical
operations. It is fundamental in digital electronics, as it is used to design and simplify digital
circuits. Boolean algebra follows specific rules and laws that help in the simplification of
logical expressions.
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2. Laws of Boolean Algebra
Boolean algebra follows a set of fundamental laws that help simplify expressions.
Basic Laws
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3. De Morgan’s Theorems
De Morgan’s Theorems are used to simplify expressions containing NOT operations.
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5. Karnaugh Maps (K-Map) for Simplification
Karnaugh Maps (K-Maps) are a graphical method used for minimizing Boolean expressions
without needing Boolean algebra rules.
Structure of a K-Map:
• A K-Map is a table of 2ⁿ cells, where n is the number of variables.
• Each cell represents a minterm (combination of inputs).
• Adjacent cells differ by only one variable.
• Cells are filled with 1s (True terms), 0s (False terms), or don't-care conditions (X).
Steps to Simplify Using a K-Map:
1. Fill the K-Map with 1s (for given minterms) and 0s.
2. Group adjacent 1s in powers of 2 (1, 2, 4, 8, etc.).
3. Form simplified expressions for each group.
4. Combine groups to get the minimal Boolean expression.
Example of a 2-Variable K-Map:
A\B 0 1
0 0 1
1 1 1
A \ BC 00 01 11 10
0 0 0 0 0
1 0 1 1 1
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4. Adders and Subtractors
1. Half Adder & Full Adder
Half Adder (HA)
A Half Adder is a combinational circuit that adds two single-bit binary numbers. It has two
inputs and two outputs:
• Inputs: A and B (two single-bit binary numbers)
• Outputs: Sum (S) and Carry (C)
• The Sum output is the XOR of the two inputs (A ⊕ B).
• The Carry output is the AND of the two inputs (A ∧ B).
Truth Table:
0 0 0 0
0 1 1 0
1 0 1 0
1 1 0 1
0 0 0 0 0
0 1 0 1 0
1 0 0 1 0
1 1 0 0 1
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0 0 1 1 0
0 1 1 0 1
1 0 1 0 1
1 1 1 1 1
0 0 0 0
0 1 1 1
1 0 1 0
1 1 0 0
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Truth Table:
0 0 0 0 0
0 1 0 1 1
1 0 0 1 0
1 1 0 0 0
0 0 1 1 1
0 1 1 0 1
1 0 1 0 0
1 1 1 1 0
3. Parallel Adder
A Parallel Adder is a circuit that adds multiple binary numbers simultaneously, providing a
sum output for each bit. In contrast to the Ripple Carry Adder, where carries propagate one
bit at a time, a Parallel Adder uses multiple full adders to add all bits at once, which makes it
faster.
For example, a 4-bit Parallel Adder adds two 4-bit numbers (A3A2A1A0 + B3B2B1B0). It uses
four full adders, one for each bit:
• The carry out of each full adder is fed into the carry input of the next full adder.
• The sum from each full adder forms the sum bits.
The Parallel Adder reduces delay by handling all the bits in parallel.
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• The carry-out for each bit is then calculated using the generate and propagate
signals, and this reduces the need to wait for the carry to propagate through each
bit.
This leads to a faster adder, especially for larger bit-widths.
5. BCD Adder
A BCD (Binary-Coded Decimal) Adder adds two BCD numbers, which are decimal numbers
represented in binary form. Each decimal digit is represented by a 4-bit binary number (from
0000 for 0 to 1001 for 9). A BCD adder works as follows:
• If the sum of two BCD digits exceeds 9 (1001 in binary), the result must be adjusted
by adding 6 (0110 in binary) to the sum to maintain valid BCD representation.
• A BCD Adder can be designed using a Full Adder for each 4-bit BCD digit, along with
a logic circuit to detect when the result exceeds 9 and apply the necessary correction
(add 6).
This ensures the correct decimal output for the addition of two decimal numbers in BCD
format.
Example of BCD Addition: Adding 7 (0111) and 8 (1000):
• Sum = 0111 + 1000 = 1111 (15 in decimal).
• Since 15 is greater than 9, add 6 (0110), resulting in 0010 (2 in decimal) with a carry
of 1.
The result is 15 in decimal, or 0001 0101 in BCD.
5. Flip-Flops
A Flip-Flop is a bistable multivibrator circuit used to store binary information. It has two
stable states (1 or 0) and can store a bit of information. Flip-flops are widely used in digital
circuits for memory storage, data synchronization, and various control functions.
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Truth Table:
S R Q (Output) Q’ (Complement)
0 1 0 1
1 0 1 0
2. JK Flip-Flop
Working Principle:
The JK Flip-Flop is a more versatile version of the SR flip-flop. It resolves the indeterminate
state issue by using two inputs: J and K, and two outputs: Q and Q’. The JK flip-flop works
similarly to the SR flip-flop but removes the invalid state issue.
Truth Table:
J K Q (Output) Q’ (Complement)
0 1 0 1
1 0 1 0
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Applications:
• Used in counters, frequency dividers, and toggle operations.
• For memory storage and data synchronization.
0 Rising Edge 0 1
1 Rising Edge 1 0
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• T = 1: The output toggles (Q inverts).
Applications:
• Used in counters (binary, decade, or up/down counters).
• Frequency division.
• Flip-flop-based toggling and synchronization.
6. Flip-Flop Applications
• Memory Storage: Flip-flops are fundamental components for memory cells in
registers, shift registers, and memory systems.
• Counters: Flip-flops are used to build binary counters (both up and down counters),
frequency dividers, and sequence generators.
• Data Synchronization: Flip-flops synchronize data streams in digital circuits, ensuring
proper timing and coordination between different components.
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• Edge Detection: In digital systems, flip-flops detect edges in signal waveforms, useful
in detecting changes in control signals or clock synchronization.
• Control Systems: Used in control circuits, where flip-flops maintain the state of a
system or controller during operation.
• Timers: Flip-flops, particularly T flip-flops, are often used in timing circuits for
generating clock pulses or timing intervals.
1. Shift Registers
Shift registers are used to store and shift data bits in a digital system. A shift register moves
binary data in a specific direction (left or right) through flip-flops.
Types of Shift Registers:
1. Serial In-Serial Out (SISO)
o Operation: The data bit enters the first flip-flop of the register, and each
subsequent flip-flop shifts the data bit to the next flip-flop on each clock
cycle. After a set number of cycles, the data bit is shifted out from the last
flip-flop.
o Usage: Often used in communication systems for serial data transmission.
Example: If the shift register is 4 bits wide and we input data 1010 serially, it would enter
and shift out bit by bit.
2. Serial In-Parallel Out (SIPO)
o Operation: Data is entered serially (one bit at a time), but the data can be
output from all flip-flops in parallel once the input is completed.
o Usage: Used when you need to receive serial data and extract it in parallel
form.
Example: Input 1010 serially, and after the data is completely entered, we can read 1010 in
parallel form from the register's outputs.
3. Parallel In-Serial Out (PISO)
o Operation: Data is entered in parallel form, and after being loaded, it can be
shifted out serially.
o Usage: Used to convert parallel data into serial data for transmission.
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Example: Input parallel data like 1010 into the register, and after loading, we can shift the
data out bit by bit.
4. Parallel In-Parallel Out (PIPO)
o Operation: Data is entered in parallel, and the entire data can be read out in
parallel without shifting.
o Usage: Commonly used to store data temporarily and read it out as needed.
Example: Input 1010 in parallel, and it can be read directly from the register in parallel.
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• Usage: Used in applications where you need to count upwards, such as in event
counting or timekeeping.
Down Counter
• Operation: A down counter decrements its value on each clock pulse. For example, a
4-bit down counter would count from 1111 (15 in decimal) to 0000.
• Usage: Used when a countdown is required, such as in timers or countdown systems.
5. Ring Counter
A Ring Counter is a type of counter where only one flip-flop is set to '1' at any given time,
and the '1' is rotated (shifted) from one flip-flop to the next.
• Operation: In a 4-bit ring counter, for example, the initial state might be 1000, and
after one clock pulse, it shifts to 0100, then 0010, and so on.
• Usage: Used in applications like state machines, sequencing operations, and control
systems where a cyclic operation is needed.
Example (4-bit ring counter):
1000 → 0100 → 0010 → 0001 → 1000 (and repeats)
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6. Johnson Counter
A Johnson Counter is a special type of shift counter where the complement of the output is
fed back into the first flip-flop.
• Operation: A 4-bit Johnson counter will generate a sequence of 8 states instead of
the usual 4. It produces a pattern that shifts the '1' bit in a way that creates a
mirrored counting sequence.
• Usage: Often used in digital systems where a more complex sequence of states is
required, such as for sequence generation or timing applications.
Example (4-bit Johnson counter):
0000 → 1000 → 1100 → 1110 → 1111 → 0111 → 0011 → 0001 → 0000 (and repeats)
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2. Static RAM (SRAM) & Dynamic RAM (DRAM)
• Static RAM (SRAM):
o Structure: SRAM stores data using flip-flops (typically 4 to 6 transistors per
bit).
o Volatility: Volatile (loses data when power is off).
o Speed: Faster than DRAM because it does not require refreshing.
o Power Consumption: Higher power consumption compared to DRAM.
o Usage: Used for cache memory, registers, and high-speed memory
applications.
o Advantages:
▪ Faster access times.
▪ Simpler interfacing and no need for refresh cycles.
o Disadvantages:
▪ More expensive.
▪ Takes up more physical space.
• Dynamic RAM (DRAM):
o Structure: DRAM stores data in capacitors, with each bit requiring a capacitor
and an access transistor.
o Volatility: Volatile, loses data when power is turned off.
o Speed: Slower than SRAM due to the need for periodic refreshing of the
capacitors.
o Power Consumption: Lower than SRAM.
o Usage: Main system memory in computers (e.g., 4GB, 8GB RAM modules).
o Advantages:
▪ Less expensive to produce.
▪ Higher memory density, so more memory can be packed into smaller
areas.
o Disadvantages:
▪ Requires constant refreshing (every few milliseconds) to retain data.
▪ Slower than SRAM.
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3. Read-Only Memory (ROM)
• Structure: ROM is a non-volatile memory that stores data in a permanent or semi-
permanent manner. The data is written during manufacturing and is not intended to
be modified under normal operation.
• Volatility: Non-volatile; retains data even when power is off.
• Usage: Often used to store firmware, boot loaders, and fixed programs required for
hardware initialization.
• Types of ROM:
o PROM (Programmable ROM): Can be written once after manufacturing. Once
programmed, it cannot be changed.
o EPROM (Erasable Programmable ROM): Can be erased using ultraviolet light
and reprogrammed.
o EEPROM (Electrically Erasable Programmable ROM): Can be electrically
erased and reprogrammed. This type of ROM allows for selective memory
erasure and rewriting.
o Advantages:
▪ Reliable and stable for long-term storage.
▪ Non-volatile, retains data without power.
o Disadvantages:
▪ Slower write speeds.
▪ Limited read/write cycles for EEPROM and similar types.
4. Flash Memory & NVROM (Non-Volatile ROM)
• Flash Memory:
o Structure: Flash memory is a type of non-volatile memory that stores data
using floating-gate transistors. It combines the characteristics of both
EEPROM and ROM.
o Volatility: Non-volatile; retains data when power is turned off.
o Speed: Faster than traditional EEPROM but slower than RAM.
o Types:
▪ NAND Flash: Widely used in SSDs, USB drives, and memory cards. It
has a high storage density but slower access speeds.
▪ NOR Flash: Typically used for storing system firmware (e.g., in
embedded systems).
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o Usage: Used for data storage in a variety of devices such as SSDs, USB flash
drives, memory cards, and smartphones.
o Advantages:
▪ High data storage capacity.
▪ Faster read speeds compared to EEPROM.
▪ More durable and robust than HDDs.
o Disadvantages:
▪ Limited number of write/erase cycles (though higher than EEPROM).
▪ Slower write speeds compared to RAM.
• NVROM (Non-Volatile ROM):
o Structure: NVROM refers to a variety of non-volatile memory types that
combine characteristics of ROM and flash memory. NVROM technologies are
designed to retain data without requiring power and are used to store
permanent or semi-permanent data.
o Volatility: Non-volatile.
o Usage: Typically used for storing configuration settings, system firmware, and
other data that must be preserved even after a power cycle. Examples of
NVROM include EEPROM, Flash, and newer technologies like MRAM
(Magnetoresistive RAM) and FRAM (Ferroelectric RAM).
o Advantages:
▪ Data retention without power.
▪ Durable and reliable, as it can withstand many write/erase cycles.
o Disadvantages:
▪ Typically slower than DRAM and SRAM for read/write operations.
▪ Limited storage capacity compared to primary memories like RAM.
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• Analog Output: A continuous voltage or current corresponding to the digital input.
Working Principle:
The DAC works by taking the binary input signal (which is made up of 0s and 1s) and
assigning a corresponding voltage or current value to each possible input. This conversion is
done by using resistors, capacitors, or other analog components to create a proportional
output based on the digital input.
Advantages:
• Simple design.
• Direct digital-to-analog conversion.
Disadvantages:
• Requires precision resistors for accurate conversion.
• As the bit-width increases, the resistor values become large and impractical.
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• Significant power consumption due to resistors and switches.
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4. Performance Characteristics of DAC
The performance of a DAC is characterized by several important factors, including
Resolution, Accuracy, and Linearity.
Resolution
• Definition: Resolution is the number of discrete steps a DAC can produce in its
output range. It is determined by the number of bits in the digital input.
• Effect: Higher resolution means the DAC can produce a finer granularity of output
values (smaller step sizes), which leads to more precise analog output.
Accuracy
• Definition: Accuracy refers to how close the output of the DAC is to the expected
output for a given digital input.
• Effect: Inaccuracies can arise due to imperfections in the resistors, reference voltage,
and circuit elements. The closer the output is to the ideal, the higher the accuracy.
• Error Sources: Tolerance of resistors, temperature variations, and power supply
fluctuations can affect accuracy.
Linearity
• Definition: Linearity refers to the relationship between the digital input and the
corresponding analog output. Ideally, a DAC should have a linear relationship, where
doubling the digital input should double the output voltage.
• Effect: Non-linearity can cause the output to deviate from the expected value, which
may result in distortion or inaccurate representations of the analog signal.
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2. Quantization: The sampled values are mapped to the nearest value in a discrete set,
creating an approximation of the analog signal.
3. Encoding: The quantized values are converted to a binary code (digital
representation).
The performance of an ADC is typically characterized by resolution (number of bits),
sampling rate (frequency of sampling), and accuracy (how close the digital value is to the
actual analog value).
1. Counter Type ADC
A Counter Type ADC (also called Digital Ramp ADC) is one of the simplest ADC designs, but
it is slow in operation.
Working Principle:
• The analog input signal is compared to a ramp signal (which increases steadily).
• A counter counts the number of clock pulses it takes for the ramp signal to match the
input analog signal.
• The final count is then converted to a digital output, which is the digital equivalent of
the analog input signal.
Features:
• Slow conversion: The process of ramping the signal is relatively slow, which limits the
ADC’s speed.
• Low resolution: It may require a long count for high resolution, making it impractical
for high-speed applications.
• Simple Design: Since it uses a basic counter and comparator, it's easy to implement
but not efficient for real-time systems.
Applications:
• Used in low-speed applications where speed is not critical, such as instrumentation
or low-frequency data acquisition systems.
2. Successive Approximation ADC
The Successive Approximation ADC (SAR ADC) is a widely used ADC type due to its balanced
speed, resolution, and complexity. It uses a binary search method to approximate the input
voltage.
Working Principle:
• A Sample and Hold circuit stores the input voltage.
• A Successive Approximation Register (SAR) generates a binary code and compares it
with the input voltage.
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• Initially, the SAR generates a mid-range value, and the comparator checks whether
the input is greater or lesser than this value.
• Based on the comparison, the SAR adjusts its binary code by setting or clearing bits,
successively narrowing down the approximation of the input voltage.
• This process continues for the number of bits in the output.
Features:
• Fast: Faster than the counter type because it only requires a few comparisons rather
than counting all the way from 0 to the full range.
• High Resolution: The resolution depends on the number of bits of the SAR and can
be quite high.
• Moderate Complexity: Requires a DAC (Digital-to-Analog Converter) for comparison
purposes.
Applications:
• Widely used in applications where speed and moderate resolution are needed, such
as audio processing, sensor interfacing, and embedded systems.
3. Flash ADC
The Flash ADC (also called Parallel ADC) is the fastest type of ADC, known for its high speed
and low latency. It is typically used in high-speed applications, such as real-time processing
or high-frequency signal analysis.
Working Principle:
• A parallel comparator array compares the input analog signal to reference voltages.
• The comparators are arranged to cover the entire input range in a parallel fashion,
each outputting a "1" or "0" depending on whether the input signal is greater or
lesser than the reference voltage.
• The result from all the comparators is used to generate the corresponding binary
code for the digital output, which represents the analog input signal.
Features:
• Very Fast: Since all comparators work simultaneously, the conversion is
instantaneous, making it ideal for high-speed applications.
• High Power Consumption: Because of the large number of comparators used, Flash
ADCs consume significant power, especially in high-resolution designs.
• High Resolution: For a given number of bits, Flash ADCs can provide very high
resolution, but as the number of bits increases, the power consumption grows
exponentially.
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Applications:
• High-speed applications like oscilloscopes, digital communication systems, radar
systems, and high-frequency signal processing.
4. Dual Slope ADC
A Dual Slope ADC is a slower but very accurate ADC type, commonly used in digital
voltmeters and other precision measurement instruments. It is based on the integration of
the input signal over a period of time.
Working Principle:
1. The input signal is first integrated over a fixed period of time (called the integration
phase). During this phase, a capacitor charges at a rate proportional to the input
voltage.
2. After the integration phase, the integrator is reset, and a reference voltage (usually a
known value) is applied to discharge the capacitor.
3. The time taken for the capacitor to discharge back to zero is measured.
4. The digital output is then proportional to the input voltage, determined by the time
it took for discharge.
Features:
• High Accuracy: Due to the use of precise integration, dual slope ADCs have high
accuracy and are less sensitive to noise.
• Slow Conversion: It is slower than most ADCs, making it unsuitable for real-time
applications but ideal for applications requiring high precision.
• Noise Immunity: Dual slope ADCs are less affected by noise, making them suitable
for environments with electrical interference.
Applications:
• Digital voltmeters, high-precision measurement systems, and applications where
accuracy is more important than speed.
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