GERÊNCIA DE ESPECIALISTAS EM SISTEMAS ELÉTRICOS DE POTÊNCIA

LABORATÓRIO DE ELETRÔNICA DE POTÊNCIA, ACIONAMENTOS E

CONTROLE DE PROCESSOS INDUSTRIAIS

MMC AND CHB CONVERTER BOARD

DESIGN REPORT

Authors: Allan Fagner Cupertino

Dayane do Carmo Mendonça
Diogo Borges da Silveira
João Victor França
João Victor Matos Farias
Jonathan Hunder Dutra Gherard Pinto
Renata Oliveira de Sousa
William Caires Silva Amorim

Viçosa – MG
2020
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CONTENTS
1. REPORT VERSION CONTROL 3

2. INPUT PARAMETERS 4

3. SEMICONDUCTOR DEVICES REQUIREMENTS 5

4. SEMICONDUCTOR DEVICES THERMAL DESIGN 6

4.1 SEMICONDUCTOR DEVICE SELECTION 6

5. SM CAPACITOR DESIGN 11

6. BLEED RESISTOR DESIGN 13

7. HIGH FREQUENCY CAPACITOR 15

8. BYPASS STRUCTURE DESIGN 16

9. GATE DRIVER DESIGN 19

10. CONNECTION OF GATE DRIVERS TO IGBT 22

11. CAPACITOR VOLTAGE MEASUREMENT DESIGN 23

12. POWER SUPLY PROTECTION 25

13. ISOLATED POWER SUPPLY DESIGN 27

14. PCB PINOUT 28

15. ASSEMBLED SUBMODULES 29

16. REFERENCES 30
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1. REPORT VERSION CONTROL

Responsible Reason Date
Dayane, Renata, Diogo e
First Version 11/02/2020
Jonathan
Allan Fagner Cupertino Review of the design methodology and format 26/03/2020
Renata Sousa Thermal Design (semiconductor device selection) 31/03/2020
Renata Sousa Inclusion of last PCB improvements 10/12/2020
Renata Sousa Inclusion of review 17/12/2020
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2. INPUT PARAMETERS
This project considerers that submodules (SMs) could be employed
is two distinct cascaded configurations: three-phasic cascaded H-
bridge in delta-connection (∆-CHB) and monophasic modular
multilevel converter with half-bridge SMs (HB-MMC).
The input parameters of this project are presented in Table 1.
Table 1 - Minimum specifications of the inverter.
Parameter Symbology Specification
𝐼 ,
Arm/cluster current 7 A (rms)

𝑉 ,∆
Grid voltage (∆-CHB) 220 V (line to line rms)

𝑉 ,
Grid voltage (HB-MMC – monophasic) 127 V (line to line rms)

𝑁∆
Number of FB-SMs (∆-CHB) 4 (per cluster)

𝑁
Number of HB-SMs (HB-MMC – monophasic) 6 (per arm)
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3. SEMICONDUCTOR DEVICES REQUIREMENTS

Considering the modulation with injection of third harmonic, the minimum required dc-link
can be approximated by (30 % of margin to include voltage drop in inductors, grid voltage
variation, deadtime and current dynamics):
𝑉 , ,∆ ≈ 1.3 × 𝑉 ,∆ = 1.3 × √2 × 220 = 404.46 𝑉 ≈ 400𝑉. (1)

𝑉 , , ≈ 2 × 1.3 × 𝑉 , = 2 × 1.3 × √2 × 127 = 466,97 𝑉 ≈ 470𝑉, (2)

where 𝑉 , and 𝑉 ,∆ are the grid voltage peak values.

In such conditions, the maximum voltage per SM is given by (10 % of ripple and 10 % of
overshoot → 20 % of margin):
𝑉 , ,∆ 400
𝑉 , ,∆ = 1.2 × = 1.2 × ≈ 120 𝑉, (3)
𝑁 4

𝑉 , , 470
𝑉 , , = 1.2 × = 1.2 × ≈ 94 𝑉. (4)
𝑁 6

Considering a utilization factor (𝑓 ) of the semiconductor devices of 60 %, the minimum

voltage class for each case is given by:
𝑉 , ,∆ 120
𝑉 ,∆ = = ≈ 200 𝑉. (5)
𝑓 0.6

𝑉 , , 94
𝑉 , = = ≈ 156.67 𝑉, (6)
𝑓 0.6

In the design, semiconductor devices with blocking voltage higher than 600 V are
considered. Under such conditions, the dc-link voltage can be increased until 450 V. This fact
can be useful to validate fault tolerance strategies (increase the arm voltage). Furthermore, the
full bridge can be used in other projects for PV applications. In addition, for voltage rating
higher than 600V there are IGBT commercially available. Moreover, to guarantee this
applicability, the thermal design considers a switching frequency of 20 kHz.
The peak of cluster/arm currents is computed to help in the IGBT pre-selection. Thus,
considering Table 1, the peak current in each cluster/arm is given by:
𝐼 = √2𝐼 , = √2 × 7 ≈ 10 𝐴. (7)

In order to increase the range of operation safety IGBTs part numbers with current rating
higher than 15 A are taken into account.
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4. SEMICONDUCTOR DEVICES THERMAL DESIGN

4.1 Semiconductor Device Selection
Following the conclusions and considerations of last section, the semiconductor devices
realization possibilities are investigated. Therefore, it is considered semiconductor voltage class
higher than 600V and forward current in range of 15 A to 30A, in which 20 kHz switching
frequency is supported.
Discrete devices are chosen, due to the facility of maintenance. In addition, Silicon IGBT
of Infineon manufacturer are investigated due to the facility of test of these technologies on the
manufacturer web site [1]. Moreover, package TO-220 and TO-247 are prioritized. Table 2
presents IGBT Infineon possibilities which fulfil these considerations.
Each Discrete IGBT is simulated in the manufacturer website [1] [2]. The simulation is
realized in PLECS environment, as presented on the schematic of Figure 1. This simulation
model includes thermal evaluation. For this reason, the power losses and junction temperature
are evaluated by this simulation. In the analyses, it is considered grid frequency of 60 Hz, grid
voltage of 220 V and grid current of 10 A. It is considered null thermal resistance (case to
reference) and reference temperature of 80ºC, in order to simulate case temperature of 80ºC.

Figure 1 - Discrete IGBT Motor Drive Schematic [1].

Table 2 presents the power losses with different power factors (FP). The FP = 0 represents
the reactive power operation (STATCOM) and FP = 1 the active power operation (HVDC). For
the IGBTs evaluated, the junction temperature is lower than 116ºC. AS observed in Table 2, the
IGBT part number IKP20N60H3 presents the better tradeoff between power losses and unitary
cost in both operation conditions. Therefore, this IGBT is considered in this project.
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Table 2 – IGBT Infineon Evaluation [1] [2].

Power Losses Power Losses Price per unit

Voltage Class Ic @100°C
Part Number (W) (W) 100 Distributor
(V) (A) 10 units
FP = 0 FP = 1 units
IKP10N60T 600 18 14,290 14,381 $1.68 $1.27 Infineon
IKP15N60T 600 23 12,997 12,782 $2.21 $1.62 Digi-key
IKP15N65H5 650 18 10,664 10,597 $2.11 $1.65 Infineon
IKP20N60H3 600 20 10,575 10,603 $2.28 $1.68 Digi-key
IKP20N60T 600 28 12,54 12,276 $2.51 $1.90 Infineon
IKP20N65F5 650 21 10,135 10,040 $2.39 $1.86 Infineon
IKP20N65H5 650 21 10,403 10,368 $2.38 $1.81 Infineon
IKW20N60H3 600 20 10,575 10,603 $2.80 $2.24 Infineon
IKW20N60T 600 28 12,540 12,276 $3.12 $2.50 Infineon
IKW30N60H3 600 30 11,294 11,208 $3.39 $2.56 Infineon
IRGB4062D 600 24 11,712 11,746 $4.3 $3.25 Infineon
IRGB4620D 600 20 11,942 11,536 $2.79 $2.10 Infineon
IRGB4630D 600 30 12,899 12,644 $3.61 $2.89 Infineon
IRGP4062D 600 24 11,716 11,752 $5.21 $4.17 Infineon
* FP = Power Factor.

4.2 Heatsink Selection

In order to select the heatsink, the maximum thermal impedance surface to ambient is
computed, as follows:
𝑇 −𝑇
𝑅 , = − 𝑅 (8)
𝑃

where 𝑇 is the maximum case temperature in °C of the device as indicated by manufacturer.

𝑇 = 80 °C is considered in this design. Moreover, 𝑇 is the ambient temperature in °C. The rise
in temperature caused by radiant heat of the heatsink should be increased by a margin of 10-30
°C. In this design, 𝑇 = 40 °C is considered. Pdissipated is the maximum power rating of device
in Watts and RcA is thermal resistance of mounting surface.
According to [3], the approximate values of Table 3 are employed.
Table 3 - Thermal resistance of mounting surface [3].
Material Resistance (K/W)
Dry, without insulator 0.05 – 0.20 K/W
With thermal compound/without insulator 0.005 – 0.10 K/W
Aluminium oxide wafer with thermal compound 0.20 – 0.60 K/W
Mica wafer (0.05 mm thick) with thermal compound 0.40 – 0.90 K/W
For this project, the mica wafer is used. Thus, the resistance employed is RcA = 0.40 K/W.
Therefore,
𝑇 −𝑇 80℃ − 40℃ ℃ ℃
𝑅 , = − 𝑅 = − 0.4 ≈ 8.49 (9)
𝑃 4.5 𝑊 𝑊 𝑊
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The heatsink choose should considered how it is represented in the manufacturer's

catalog. According to the manufacturer chosen for this project, all of its models had a
temperature of 75°C and a length of 4 inches. In this way, it is necessary to carry out conversions
to adapt to the catalog model.

Table 4 - Variation of thermal resistance with temperature difference [4].

∆℃ 75 70 60 50 40 30

Correction factor 1.000 1.017 1.057 1.106 1.170 1.257

Considering the temperature correction factor of ∆ = 40 ℃, gives:

2.74℃/𝑊 ℃
𝑅 , (75℃) = ≈ 7.26 (10)
1.17 𝑊

Table 5 - Correction of thermal resistance for other heatsink lengths [4].

Length (mm) 10 20 30 40 50 70 100 150 200 250 300 400 500

correction factor 3.05 2.21 1.82 1.59 1.43 1.22 1.04 0.86 0.75 0.67 0.62 0.54 0.49
Using the length correction factor to 40 mm, given by:
7.26℃/𝑊 ℃
𝑅 , (4") = ≈ 4.57 (11)
1.59 𝑊

According to the calculations above, the chosen model selected HS4225 1.

4.3 Maximum Current and Switching Frequency
The system was simulated with different switching frequency and the maximum output
current which respect the maximum junction temperature of the IGBT selected, in order to
define the maximum SM operation condition.
The IGBTs were evaluated in half-bridge and full-bridge configuration, as illustrated in
Figure 2 and Figure 3, respectively.

1
https://www.hsdissipadores.com.br/catalogo.pdf
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Figure 2- Half-bridge simulation. Figure 3 - Full-bridge simulation.

The design was tested considering different switching frequencies of each configuration, for
a maximum junction temperature of 120º C, as show in Table 6 and Table 7 for half-bridge and
full bridge configurations respectively. Tests were also made for the case of the full bridge
circuit with only the AC component, for different power factors. The results are being shown
in Figure 6.
Table 6 - Maximum output current with different PWM switching frequency for half-bridge
configuration.
Frequency Max. Output
(kHz) Current RMS (A)
0.5 13,50

1 13,40

2 13,10

3 12,75

4 12,50

5 12,25

10 11,20

15 10,40
Figure 4 – Maximum output current as function of PWM switching
20 9,70 frequency.

Table 7 - Maximum output current with different PWM switching frequency for full-bridge configuration.
Frequency Max. Output
(kHz) Current RMS (A)
0.5 13,50

1 13,40

2 13,00
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3 12,75

4 12,50

5 12,25

10 11,20

15 10,40

20 9,65

Figure 5 – Maximum output current as function of PWM switching

frequency.

Figure 6 - Maximum output current as function of PWM switching frequency for different current
components
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5. SM CAPACITOR DESIGN
For this design, the nominal total power of the converters is given by:
𝑆 , = 𝐼 𝑉 = 2𝐼 , 𝑉 = 2 × 7 × 127 ≈ 1.778 𝑘𝑉𝐴, (12)

𝑆 ,∆ = √3𝐼 𝑉 = 3𝐼 , 𝑉 = 3 × 7 × 220 ≈ 4.62 𝑘𝑉𝐴. (13)

In addition, the maximum capacitor voltage is given by:

𝑉 , ,∆ 400 4
𝑉 , ,∆ = 1.2 × × 𝐾 = 1.2 × × ≈ 160 𝑉, (14)
𝑁∆ 4 3

𝑉 , , 470 4
𝑉 , , = 1.2 × × 𝐾 = 1.2 × × ≈ 125.33 𝑉, (15)
𝑁 6 3

where 𝐾 is the voltage increase during redundant operation (1 failure for ∆-CHB and 2 failures
for MMC). For this reason, capacitor with voltage higher than 160 V are considered.
Moreover, the maximum rms ripple current in the capacitor can be approximated by [5]:

𝐼 2 7 ∙ √3√2 2
𝐼 , ,∆ = = → 𝐼 , ,∆ = 4.56 𝐴 (16)
3 𝜋 3 𝜋

𝐼 7 ∙ 2√2
𝐼 , , = = → 𝐼 , , = 4.94𝐴 (17)
4 4

5.1 SM capacitance based on energy storage requirements

It is considered a ripple of 10 % and sinusoidal modulation. For the
cases of MMC the minimum energy storage requirement considered is
60 J/kVA, while for ∆-CHB the minimum energy storage requirement
is 30 J/kVA.
The total required energy storage is given by:
𝐸 , = 𝑊 × 𝑆 = 60𝐽/𝑘𝑉𝐴 × 1.778 𝑘𝑉𝐴 = 106.68 𝐽, (18)

𝐸 ,∆ = 𝑊 × 𝑆 = 30 𝐽/𝑘𝑉𝐴 × 4.62 𝑘𝑉𝐴 = 138.6 𝐽 . (19)

Therefore, the cell capacitance is given by:

2𝐸 2 × 106.68
𝐶 ≥ = → 𝐶 ≥ 2.90 𝑚𝐹 ,
2𝑁 𝑉 , 470 (20)
2×6× 6

2𝐸 2 × 138.6
𝐶∆ ≥ = → 𝐶 ≥ 2.31 𝑚𝐹.
3𝑁 𝑉 ,∆ 400 (21)
3×4× 4
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The SM voltage ripple estimated in this design is [5]:

5𝑆 , 5 × 1.778 𝑘𝑉𝐴
𝛿 = =
24𝜔𝑉 𝑉 ∗
𝐶 470𝑉
, , 24 × 2𝜋60 × 127√2 6 × 2.9𝑚𝐹
(22)
𝛿 = 2.41% (≈ 1.89𝑉)

𝑆 ∆ 4.62 𝑘𝑉𝐴
𝛿∆ = =
6√3𝜔𝑉 ,∆ 𝑉 ∗ 220𝑉 400𝑉
,∆ 𝐶∆ 6√3 × 2𝜋60𝐻𝑧 × √2 × 2.31𝑚𝐹
√3 4
(23)

𝛿∆ = 2.84% (≈ 2.84𝑉)

This ripple is very low for the analyses desired in future experimental results.
5.2 SM capacitance based on Ripple realization
SM voltage ripple of 𝛿 = 10% is considered. Thus [5],
5𝑆 , 5 × 1.778 𝑘𝑉𝐴
𝐶 = =
24𝜔𝑉 𝑉 ∗
𝛿 470𝑉
, , 24 × 2𝜋60 × 127√2 6 × 0,1
(24)
𝐶 = 0,698𝑚𝐹

𝑆 ∆ 4.62 𝑘𝑉𝐴
𝐶∆ = =
6√3𝜔𝑉 ,∆ 𝑉 ∗ 220𝑉 400𝑉
,∆ 𝛿∆ 6√3 × 2𝜋60𝐻𝑧 × √2 × 0,1
√3 4
(25)

𝐶∆ = 0,656𝑚𝐹

The realization of this capacitance is made by 1 capacitor manufacturer EPCOS - TDK

Electronics of 680µF 200V Aluminum Electrolytic Capacitors Radial, part number
B43634A2687M060. This capacitor supports ripple current of 4.63A @100Hz at 60°C.
The capacitor chosen also provide the possibility to employ 4 capacitors in parallel for
supply the design of the previous subsection.
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6. BLEED RESISTOR DESIGN

Considering the 1 capacitor of 680µF in each SM for the topologies
MMC and ∆-CHB, it is possible to calculate the bleed resistor
considering converter power losses equal 0.5%.
For MMC, the power losses per SM are:
0.5 0.5
𝑆 , × = 1.778𝑘𝑉𝐴 × = 8.89𝑊 = 𝑃 ×𝑁 ×2 (26)
100 100

𝑃 = 0.74𝑊 (27)

Considering these losses, the bleeding resistance is:

𝑉 𝑉 200
𝑃 = ⇒ 𝑅 , = = = 54.05𝑘𝛺 (28)
𝑅 , 𝑃 0.74

For ∆-CHB, the power losses per SM are:

0.5 0.5
𝑆 ,∆ × = 4.62 𝑘𝑉𝐴 × = 23.1𝑊 = 𝑃∆ × 𝑁∆ × 3 (29)
100 100

𝑃∆ = 1.93𝑊 (30)

Considering these losses, the bleeding resistance is:

𝑉 𝑉 200
𝑃∆ = ⇒ 𝑅 ,∆ = = = 20.73𝑘𝛺 (31)
𝑅 , 𝑃∆ 1.93

Commercial Resistor
For MMC and ∆-CHB, the commercial resistors which fulfil the
previous consideration are 56 kΩ / 1 W and 21 kΩ / 2 W, respectively.
Nevertheless, in order to employ a unique type of bleeding
resistor, the resistor of 𝑅 = 56 kΩ / 1 W is chosen. The discharge with this
resistor is given by:
5𝜏 = 5𝑅 𝐶 = 5 × 56 𝑘𝛺 × 680µ𝐹 = 190𝑠 = 3𝑚𝑖𝑛10𝑠 (32)

The power losses in both cases are:

𝑉 200
𝑃= = = 0.71𝑊 (33)
𝑅 56 × 10

Percentage of losses for MMC:

𝑃×𝑁 ×2 8.57𝑊
= = 0.48%
𝑆 , 1.778𝑘𝑉𝐴

Percentage of losses for ∆-CHB:

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𝑃 × 𝑁∆ × 3 8.57𝑊
= = 0.18%
𝑆 ,∆ 4.62 𝑘𝑉𝐴

Therefore, 𝑅 = 56 kΩ / 1 W is employed for both topologies.

Device suggestion: Metal Film Resistors 1watt 56Kohms 5%, part number
PR01000105602JA100.
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7. HIGH FREQUENCY CAPACITOR

This capacitor is employed to filter the high frequency instabilities of the SM. This capacitor
must fulfil the voltage requirements of the SM. The capacitance stipulated is 1µF.
Therefore, a polyester EPCOS capacitor of 1µF/250V, part number B32522.
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8. BYPASS STRUCTURE DESIGN

Two protection devices were implemented which can guarantee fast reaction times (TRIAC)
and permanent SM by-pass with little losses (RELAY).
8.1 TRIAC
● A Triac is used for its ability to switch independent of the current direction;
● The Triac is controlled by an Opto-Triac;
● Since the maximum current output of the DSP is under 20mA and the LED in the opto-
triac (MOC3041) requires at least 15mA, a transistor was used to control the LED.
● A pull-down resistor is used at the base of the transistor in order to ensure that it will
not be turned on by Electro Magnetic Interferences (EMI).
For the SM bypass, the following TRIAC circuit is employed:

Figure 7 – Schematic of the bypass circuit (TRIAC representation).

Considering that the LED trigger current (𝐼 = 𝐼 ) of triac driver photocoupler is 15 mA
and the maximum absolute value is 60 mA, the resistor 𝑅 is evaluated to ensure 𝐼 = 20𝑚𝐴.
Thus:
(𝑉 − 𝑉 − 𝑉 ) 5 − 1.3 − 0.2
𝑅 = = = 175 𝛺 , (34)
𝐼 20 × 10

The transistor BC548 is used to guarantee a current gain of 𝛽 = 110. In this view, the base
current is:
𝐼 20 × 10
𝐼 = = = 0.18 𝑚𝐴 (35)
𝛽 110

Once the base current was calculated, the resistor 𝑅 can be given by:
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𝑉 −𝑉 3.3 − 0.6
𝑅 = = = 15 𝑘𝛺 (36)
𝐼 0.18 × 10

The pull-down resistor is chosen based on typical values, in this work, 𝑅 = 22 𝑘𝛺.
Moreover, the resistor 𝑅 is used to limit the gate current of TRIAC. According to [6], the surge
current in the gate can reach half the peak gate current (𝐼 ). Thus, the resistor can be evaluated
by:
𝑉 , 120 𝑉
𝑅 ≥ = = 120 𝛺 (37)
0.5𝐼 1𝐴

8.2 RELAY
● An inrush current diode was placed in parallel to the relay, in order to protect the
transistor from the high inrush current which will appear at the turn off of the relay.
● Since the relay needs a higher current on the control side to be driven, as in TRIAC
design, a transistor was used;
● A pull-down resistor was used in order to ensure that the relay won’t be accidentally
turned on.
For the SM bypass, the following relay circuit is employed:

Figure 8 - Schematic of the bypass circuit (relay representation).

Considering that coil resistance of the relay (SRD-5VDC) is 70 𝛺. The collector current
can be evaluated by:
𝑉 −𝑉 5 − 0.2
𝐼 = = = 68.57 𝑚𝐴 (38)
𝑅 70
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Therefore,
𝐼 68.57 × 10
𝐼 = = = 0.62 𝑚𝐴 (39)
𝛽 110

The resistor 𝑅 is given by:

(𝑉 −𝑉 ) 5 − 0.3
𝑅 = = = 7.58 𝑘𝛺 , (40)
𝐼 0.62 × 10

As defined in TRIAC design, the pull-down resistor is chosen based on typical values, in
this work, 𝑅 = 22 𝑘𝛺.
To indicate the bypass circuit operation, an LED with a current of 1.5 𝑚𝐴 is chosen. Thus,
the LED resistor is given by:
𝑉 −𝑉 3.3 − 1.9
𝑅 = = = 0.93 𝑘𝛺 (41)
𝐼 1.5 × 10

Finally, based in commercial values, the main evaluated parameters are shown in Table 8.
Table 8 – Parameters used in the bypass circuit.
TRIAC
𝑅 𝑅 𝑅 𝑅 𝑇𝐵𝐽 𝑇𝑅𝐼𝐴𝐶 𝐷𝑟𝑖𝑣𝑒𝑟

180 Ω 15 𝑘𝛺 22 𝑘Ω 180 Ω 𝐵𝐶548 𝐵𝑇139 𝑀𝑂𝐶3041

RELAY
𝑅 𝑅 𝑅 𝐷𝑖𝑜𝑑𝑒 𝑅𝑒𝑙𝑎𝑦 𝐿𝐸𝐷

3𝑚𝑚 − 1.5𝑚𝐴
10 𝑘Ω 22 𝑘Ω 1 𝑘Ω 1𝑁4148 𝑅𝐸𝐿𝐸_𝐽𝑍𝐶 − 36𝐹 10𝐴
(red)

8.3 TRANSIENT PROTECTION

A varistor is also added to the circuit in order to protect against voltage transient. The
voltage capability of this circuit is 220V.

Figure 9 - Varistor.
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9. GATE DRIVER DESIGN

When choosing a gate driver, different aspects were taken into consideration: built-in
insulation, half-bridge driving capability, easy dead-time implementation, driver disable
function and possibility to be used in a bootstrap configuration.
The IR2104 Integrated Circuit (IC) from International Rectifier, was chosen based on its
qualities. The floating channel is designed for bootstrap operation and can be used to drive an
N-channel power MOSFET or IGBT in the high side configuration. It can support up to 500 V
between driving outputs. As a general rule the local 𝑉 decoupler capacitor is 𝐶 =
100 𝑛𝐹.

Figure 10 – Gate driver schematic (IR2104).

The calculations for the bootstrap circuit are done considering the switching frequency and
the gate charge of the IGBT. Considering the IGBT switch IKP20N65F5, the total gate charge
is 𝑄 = 48 𝑛𝐶. Moreover, a maximum allowed voltage drop for the driving circuit selected is
𝛥𝑉 = 0.2 𝑉 [7]. The minimum bootstrap capacitor is calculated as:
𝐷 0.95
𝑄 +𝐼 , 48 × 10 + 10 × 10
𝑓 , 20 = 2.62 𝜇𝐹 ,
𝐶 = = (42)
𝛥𝑉 0.2

where, 𝐼 , is the quiescent current of the bootstrap circuit, 𝐷 is the maximum duty
cycle and 𝑓 , a minimum switching frequency. 𝐼 , = 10 µ𝐴 is a typical value of
bootstrap current. A maximum duty cycle of 𝐷 = 0.95 is employed. Since the power
converter can operate with electric drives, the minimum switching frequency chosen is
𝑓 , = 20 𝐻𝑧.
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The rule of thumb is to select a good quality ceramic capacitor with some reserve, usually
double the size is a good practice. For this circuit the bootstrap capacitor is a 4.7 𝑢𝐹 ceramic
capacitor.
A Schottky diode is generally recommended as the bootstrap diode. For this, the average
forward current for selecting the diode can be estimated based on a maximum switching
frequency of 20 𝑘𝐻𝑧 as:
𝐼 =𝑄 ×𝑓 , = (48 × 10 ) × (16 × 10 ) = 0.960 𝑚𝐴 , (43)

The driving circuit needs to load the IGBT gate charge in order to open it, and most of the
times a gate resistance needs to be present in order to limit the current. The resistance can be
calculated based on the gate charge, the turn-on delay time and turn-on rise time. The equation
for the gate current is computed by:
𝑄 48 × 10
𝐼 = = = 1.5 𝐴 , (44)
𝑡 ( ) +𝑡 19 × 10 + 13 × 10

After this, considering the supply voltage (𝑉 ) and the nominal current gate voltage (𝑉 , ),
the on gate resistance can be calculated by [8]:
𝑉 −𝑉 ( ) 15 − 4.8
𝑅 , = = = 6.8 Ω , (45)
𝐼 1.5

Furthermore, if 𝑑𝑉 /𝑑𝑡 = 1 𝑉/𝑛𝑠 , the turn-off gate resistor is calculated as [8]:

𝑉 ( ), 3.2
𝑅 , ≤ = = 640 Ω ,
𝑑𝑉 (5 × 10 ) × 10 (46)
𝐶 ( ) 𝑑𝑡

where 𝐶 ( ) is the Miller effect capacitor, specified as reverse transfer capacitance 𝐶 in

the IGBT datasheet.
The gate resistance can be employed as shown in Figure 10. In this case, the 𝑅 =𝑅 ,

and 𝑅 , = 𝑅 //𝑅 . Thus,

𝑅 𝑅 ,
𝑅 = , (47)
𝑅 −𝑅 ,

According to [9], the value of an optimized gate resistor will be somewhere between the
value indicated in the IGBT (𝑅 = 32 Ω). Moreover, in most applications, the turn-on gate
resistor 𝑅 , is smaller than the turn-off gate resistor 𝑅 , . Depending on the individual
parameters, 𝑅 , can be roughly twice the 𝑅 , value. Therefore, the gate resistors can be
evaluated by:
𝑅 =𝑅 , , (48)
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𝑅 =𝑅 = 𝑅 , . (49)

Finally, based in commercial values and the margins in the evaluated values, the main
evaluated parameters are shown in Table 9.
Table 9 – Parameters used in the gate driver (IR2104) circuit.
𝑅 , 𝑅 , 𝐶 𝐶 𝐷𝑖𝑜𝑑𝑒

32 Ω 32 Ω 4.7 𝜇𝐹 100 𝑛𝐹 1𝑁5817 − 𝐵

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10. CONNECTION OF GATE DRIVERS TO IGBT

In order to minimize stray inductance between the gate driver and IGBT module, the circuit
of Figure 11 is recommended [10].

Figure 11 - Gate Driver Connection & Stray Inductances [10].

According to [10], it is recommended that a 10kΩ resistor (RGE) be placed between the gate
and emitter. If wire connection is used, do not place the RGE between printed circuit board and
IGBT module. RGE has to be placed very close to the IGBT module.
Moreover, the use of a suppressor diode (back-to-back Zener diode) between gate and
emitter is recommended. The diode has to be placed very close to the IGBT module. In this
project, two Zener diodes of 15V Vishay, part number BZX584C15-G3-08, are employed.
Furthermore, the use of a capacitor (CGE) between gate and emitter can be advantageous,
even for high-power IGBT modules and parallel operation. The CGE has to be placed very close
to the IGBT module. The CGE should be approximately 10% of the gate-emitter capacitance
(CGE*) of the IGBT used. Considering the IGBT IKP20N60H3 datasheet and reference [11],
the CGE is given by:
1 ∗ 𝐶 − 𝐶 1100𝑝𝐹 − 5𝑝𝐹 1068𝑝𝐹
𝐶 = 𝐶 = = = = 106.8𝑝𝐹 ≈ 110𝑝𝐹 (50)
10 10 10 10

where 𝐶 is the IGBT input capacitance and 𝐶 is the IGBT reverse transfer capacitance.
Therefore, in this project, a capacitor Kemet of 110pF, 50V, part number
C0603C111J5GACTU, is employed.
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11. CAPACITOR VOLTAGE MEASUREMENT DESIGN

Avago Technologies HCPL-7520 linear optoisolator was used in this project [12]. This
device has a linear transfer characteristic curve for the -200 mV to 200 mV input range, Figure
12. The input is differential, and the output is scaled to vref. The gain is .
. This single chip

allows you to polarize the signal to , amplify and isolate it [13]. 𝑣 was set to 5 V.

Figure 12 - Recommended supply and sense resistor connections [12].

To measure voltage, the idea is to use a very large voltage divider to divide the vsystem = 250
V for MMC or vsystem = 450 V for PV system down to level which can be sampled by the ADC,
given by:
𝑅
𝑣 = 𝑣 (51)
𝑅 + 𝑅

Performing the project for an MMC system the values of R1 and R2 are, respectively:
2.6MΩ and 2kΩ. Performing the project for a PV system the values of R1 and R2 are,
respectively: 2.6MΩ and 1.1kΩ. By assigning the values obtained above it is possible to
calculate the output voltage, vout, of the IC [13].
0.512 𝑣
𝑣 = 𝑣 − (52)
𝑣 2

2𝑣 𝑣 + 𝑣 × 0.512
𝑣 = (53)
2 × 0.512

Considering the MMC system, the output voltage of the HCPL-7520 will be equal to: vout
= 2.5 V (considering vin=0V) and 4.45V (considering vin =200mV).
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In this way, the voltage obtained at the HCPL-7520 output exceeds the DSP power limit
(3.3V). Thus, the solution adopted was to use TLV247X a subtractor-type operational amplifier
to reduce this scale, Figure 13.

Figure 13 - Noninverting Op Amp [14].

Thus, when the output of the HCPL-7520 is equal to 2.5V, the output voltage of the op
amp will be 0. For a voltage equal to 4.45V, the output of the op amp is approximately 3V,
according to the equations below [15]:
𝑅
𝑣 = (𝑣 − 𝑣 ) (54)
𝑅

𝑅 𝑅 +𝑅 𝑅
𝑣 =𝑣 − 𝑣 (55)
𝑅 +𝑅 𝑅 𝑅

𝑣 = 𝑚𝑣 + 𝑏 (56)

{0 = 2.5𝑚 + 𝑏 3 = 4.45𝑚 + 𝑏 (57)

After determining the values of the gains m = 1.539 and b = -3.846, it is possible to
calculate the values of the resistances to be used, given by.

𝑅
𝑏 = −𝑣 (58)
𝑅

𝑅 𝑅 + 𝑅
𝑚 = (59)
𝑅 + 𝑅 𝑅

The R1 and RG resistors were established at 7.68kΩ and 10kΩ, respectively. In this way,
R2 = 51.1kΩ (49.9kΩ), and RF = 7.68kΩ. In addition, VCC and VREF = 5 V. After similar the
circuit in the software TINA - Texas Instruments2, the transfer curve for this circuit is shown in
Figure 14.

2
SPICE-based analog simulation program - TINA-TI - <http://www.ti.com/tool/TINA-TI >
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Vin- Input Voltage [V]

5
4
3
2
1
0
0 1 2 3 4
Vout - Output Voltage [V]

(a)

(b)
Figure 14 - Circuit Measured Transfer Curve (VC_MED and VH_OUT are the output and input of op-
amp, respectively).

12. POWER SUPLY PROTECTION

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The main supply of the board is 5V. In order to protect the electronics from fluctuation of
the external power supply, over-voltage or inversing polarity of the supply, the circuit in Figure
15 is employed.

Figure 15 - Power supply protection.

In Figure 15, the Diode D3 is a fast recovery Schottky diode, rated for 30V and 3A, part
number CMS01. It is placed there to ensure that if accidentally the polarity of the power supply
is reversed, it will provide a conductive path and help protect the electronics on the board. Diode
D9 is identical to D3 and its purpose is also to protect the board. In case of reverse polarity, it
will block the reversed voltage and together with D3 will protect the components. Diode Z10 is
an 5.6V Zener diode from Vishay, part number BZX384C5V6-HG3-08. In case the input
voltage will be higher than 5.6V it will clamp it, and protect the voltage regulator from
overheating due to the increased voltage.
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13. ISOLATED POWER SUPPLY DESIGN

It is defined 5V as input voltage of the power supply system. Table 10 presents the
components which require power supply with the respective voltage level.
Table 10 - Components power supply.

Component Part Number Voltage supply Reference Current supply

Input Buffers SN74LV1T34 5V DSP 4 x 50 mA
Optocoupler ACSL-6400 5V Full-bridge SM 10 mA
IGBT Gate drivers IR2110 15V Full-bridge SM 2 x 0.34 mA
Isolated Linear Sensing Full-bridge SM /
HCPL-7520 5V 2 x 16 mA
IC DSP
Bypass circuit TRIAC+Rele+LED 15V Full-bridge SM 2 mA

Considering the voltage levels above, 2 isolated dc/dc converters will be required according
to Table 11.
Table 11 - dc/dc converters
dc/dc Output
Part Number Comments
converter Current
https://assets.tracopower.com/20200326110658/TBA1/doc
5V/5V TBA 1-0511 200 mA
uments/tba1-datasheet.pdf
https://assets.tracopower.com/20200326110658/TBA2/doc
5/15V TBA 2-0513 130 mA
uments/tba2-datasheet.pdf
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14. PCB PINOUT

The description of each pin of the Header connector of 14 pins is detailed in Table 12.
Table 12- Connector Header 14 pins.
Input or output Input or output
Pin Signal Pin Signal
(I/O) (I/O)
14 I GND_DSP 13 I BYPASS
12 I GND_DSP 11 I GND_DSP
10 I GND_DSP 9 I PWM1
8 I GND_DSP 7 I GND_DSP
6 I GND_DSP 5 I RESET
4 I GND_DSP 3 I GND_DSP
2 I GND_DSP 1 I PWM2

The power supply connector MSTBA3 is detailed in Table 13.

Table 13 - Power supply connector MSTBA3.
Pin Input or output (I/O) Signal
1 I 5V
2 I GND_DSP
3 I Board Grounding

The SM voltage measurement connector MSTBA2 is detailed in Table 14.

Table 14 – SM Voltage measurement connector MSTBA2 (MED).
Pin Input or output (I/O) Signal
1 O GND_DSP
2 O VC_MED

The connector of the points between superior and inferior IGBTs, called as MID1 and
MID2, are detailed in Table 15 and Table 16, respectively.
Table 15 – MID1 connector MSTBA2 (MID1).
Pin Input or output (I/O) Signal
1 O MID1
2 O MID1
Table 16 – MID2 connector MSTBA2 (MID2).
Pin Input or output (I/O) Signal
1 O MID2
2 O MID2

The connector of the SM voltage, called as V_CAP is detailed in Table 17.

Table 17 – SM voltage connector MSTBA2 (V_CAP).
Pin Input or output (I/O) Signal
1 O V_CAP
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2 O V_CAP

The connector of the SM reference, called as GND_CELL is detailed in Table 18.

Table 18 – SM reference connector MSTBA2 (GND_CELL).
Pin Input or output (I/O) Signal
1 O GND_CELL
2 O GND_CELL

15. ASSEMBLED SUBMODULES

Five submodules of the first version were made and 10 more are being manufactured.
Figure 16 shows the top view of the finished submodule of the first version

Figure 16 -Board top view.

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16. REFERENCES

[1] "Discrete IGBT Motor Drive Simulator," Infineon, [Online]. Available:

https://plex.infineon.com/plexim/igbtmotor.html?_ga=2.237241731.2085572244.1585569292-
774482458.1584963065. [Accessed 27 Março 2020].

[2] "Discrete IGBT with Anti-Parallel Diode," Infineon, [Online]. Available:

https://www.infineon.com/cms/en/product/power/igbt/igbt-discretes/discrete-igbt-with-anti-
parallel-diode/. [Accessed 27 Março 2020].

[3] Fischer Elektronik, "SK9-XX-AL Datasheet," 2012.

[4] Hs Dissipadores, "Catálogo Hs Dissipadores," [Online]. Available:

https://www.hsdissipadores.com.br/catalogo.pdf. [Accessed 29 March 2020].

[5] D. C. Mendonça, R. O. d. Sousa, J. V. M. Farias, H. A. Pereira, S. I. S. Jr and A. F. Cupertino,

"Multilevel Converter for Static Synchronous Compensators: State-of-art, Applications and
Trends".," in ower Electronics for Green Energy Conversion, Wiley, 2020.

[6] STMicroelectronics, "Controlling a Triac with a phototriac," ST, 2018.

[7] E. –. P. Eni, "Fault tolerant distributed control strategy for Modular Multilevel Converter in HVDC
applications," Aalborg, 2013.

[8] Fairchild Semiconductor Corporation, "Design and Application Guide of Bootstrap Circuit for High-
Voltage Gate-Drive IC," 2008.

[9] SEMIKRON, "Gate Resistor – Principles and Applications (AN-7003)," 2007.

[10] Semikron, "Application Note AN-7002 - Connection of Gate Drivers to IGBT and Controller," 2016.

[11] Vishay, "E Series Power MOSFET - SiHB20N50E," [Online]. Available:

https://www.vishay.com/docs/91634/sihb20n50e.pdf. [Accessed 16 December 2020].

[12] "The HCPL-7520 Isolated Linear Sensing IC," [Online]. Available:

https://docs.broadcom.com/doc/AV02-0956EN. [Accessed 01 April 2020].

[13] T. Clark, "Smart Power Strip," June 2011. [Online]. Available:

https://drc.libraries.uc.edu/bitstream/handle/2374.UC/689377/EET2011_Clark_Tim.pdf?sequen
ce=1. [Accessed 12 April 2021].
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[14] "The TLV2474 Quad 6V, low-power rail-to-rail input/output op amp," [Online]. Available:
http://www.ti.com/lit/ds/symlink/tlv2474.pdf. [Accessed 01 April 2020].

[15] R. Mancini, "Single-supply op amp design," Texas Instruments Incorporated, 2005.

[16] J. V. Farias, A. F. Cupertino, H. Pereira, S. Seleme and R. Teodorescu, "On the redundancy
strategies of modular multilevel converters," IEEE Trans. Power Del., vol. 33, no. 2, pp. 851-860,
2018.

[17] M. Hagiwara, R. Maeda and H. Akagi, "Negative-sequence reactivepower control by a PWM

STATCOM based on a modular multilevel," IEEE Trans. Ind. Appl., vol. 48, no. 2, pp. 720-729, 2012.

[18] Texas Instruments, "LM5104 High-Voltage Half-Bridge Gate Driver With Adaptive Delay," Dallas,
2014.

[19] G. J. M. d. Sousa, Estudo de conversores modulares multinıveis (MMC) uni- e bidirecionais,

Florianopolis, 2014.