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DLD Lab 5

The document outlines a lab exercise for Digital Logic Design focusing on the design of combinational circuits using VHDL. It includes objectives such as designing a 2-bit comparator, converting a 4-bit binary number to Gray code, and generating the 9's complement of a BCD digit. The lab also requires pre-lab preparations, software requirements, and post-lab questions related to circuit design and Gray code advantages.

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3 views2 pages

DLD Lab 5

The document outlines a lab exercise for Digital Logic Design focusing on the design of combinational circuits using VHDL. It includes objectives such as designing a 2-bit comparator, converting a 4-bit binary number to Gray code, and generating the 9's complement of a BCD digit. The lab also requires pre-lab preparations, software requirements, and post-lab questions related to circuit design and Gray code advantages.

Uploaded by

kddas260304
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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DIGITAL LOGIC DESIGN LAB (EET1211)

LAB V: Design of combinational circuits using VHDL

Siksha ‘O’ Anusandhan (Deemed to be University), Bhubaneswar

Branch: Section: Subgroup No.:

Name Registration No. Signature

Marks: ____/10

Remarks:

Teacher’s Signature
I. Objective:

1. Design a 2 bit Comparator circuit.


2. Design a combinational circuit with four inputs and four outputs that converts a
4bit binary number into the equivalent 4bit Gray code
3. Design a combinational circuit with four input lines that represent a decimal digit in
BCD and four output lines that generate the 9’s complement of the input digit.
II. Pre-lab:

Obj. 1:

a) Obtain the truth table.


b) Derive the Minimized Boolean expression for each output of the circuit.
c) Draw the logic diagram for the circuit.
d) Write VHDL code.

Obj. 2:

a) Obtain the truth table.


b) Derive the Minimized Boolean expression for each output of the circuit.
c) Draw the logic diagram for the circuit.
d) Write VHDL code.

Obj. 3:

a) Obtain the truth table.


b) Derive the Minimized Boolean expression for each output of the circuit.
c) Draw the logic diagram for the circuit.
d) Write VHDL code.

III. LAB:

Software Required:

Observation:

(Attach screenshot of Source code, Test bench, Schematic diagram and


waveform)

IV. CONCLUSION:

V. POST LAB:

1. Design a 3 bit majority circuit.

2. What is the advantage of Gray code?

3. Draw the logic circuit that converts a 4 bit Gray code to binary code.

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