MICROPROCESSOR SYSTEMS

KNEC REVISION QUESTIONS & ANSWERS

PREPARED BY MADAM SHARON
THIKA TECHNICAL TRAINING INSTITUTE

1. Distinguish Between OPCODE And OPERAND With Reference To

Microprocessors.

OPCODE: Short for Operation Code, is the part of a machine language instruction that specifies
the operation or task to be performed by the microprocessor. Example: In the instruction "ADD
A, B," the opcode is the code representing the addition operation i.e. ADD

OPERAND: Is the part of a machine language instruction that provides the data or the address
of data on which the operation specified by the opcode is to be performed. Example: In the
instruction "ADD A, B," the operands are registers A and B.

2. Draw The Flag Register Of Intel 8085 Microprocessor.

The flag register of the Intel 8085 microprocessor typically includes the following flags:

 Sign (S) flag: Indicates the sign of the result after an arithmetic operation.

 Zero (Z) flag: Set if the result of an operation is zero.

 Auxiliary Carry (AC) flag: Used for binary-coded decimal (BCD) arithmetic.

 Parity (P) flag: Indicates whether the number of set bits in the result is even or odd.

 Carry (CY) flag: Set if there's a carry out of the most significant bit during arithmetic
operations.
3. With Aid Of A Timing Diagram, Describe The Opcode Fetch Machine Cycle.

(T1) Address Phase: The microprocessor places the memory address of the next
instruction on the address bus. The address is typically stored in the program counter
(PC).

(T2) Read Phase: The microprocessor activates the Read (RD) signal, indicating a read
operation. The memory responds by placing the specified address onto the data bus.

(T3) Fetch Phase: The microprocessor reads the opcode from the data bus and stores it
in the instruction register (IR). The program counter is incremented to prepare for the
next instruction.

(T4) Execution Phase: The op-code byte is placed in instruction decoder of MP and the
op-code is decoded and executed.

Kindly note that there are other 6 machine cycles that can be tested, make sure you
know how to draw and explain the T states of all of them
 4. Table 1 Shows An 8085 Microprocessor Assembly Language Program.

(i) Hand-Code The Program Into It’s Equivalent Hexadecimal Machine Code.

(ii) Determine The Length Of The Program In Bytes.

(iii) Explain What The Program Accomplishes

Hand-Coding to Hexadecimal Machine Code:

4000: 21 01 4A

4003: 11 01 51

4006: 16 05

4008: 7E

4009: 02

400A: 23

400B: 13

400C: C2 07 40

400F: 76

Length of the Program: The program consists of 16 bytes, ranging from address 4000H to
400F.
Explanation of the Program:

Initialization:

 LXI B, 4A01H: Load immediate data 4A01H into register pair BC.

 LXI D, 5101H: Load immediate data 5101H into register pair DE.

 MVI D, 05H: Move immediate data 05H into register D.

Loop:

 LOOP: Label indicating the start of the loop.

 MOV A, M: Move the content of the memory location specified by HL into

register A.

 STAX B: Store the content of register A at the memory location specified by

register pair BC.

 INX H: Increment register pair H and update the memory address.

 INX B: Increment register B.

 DCR D: Decrement register D.

 JNZ LOOP: Jump to the LOOP label if the Zero flag is not set.

Termination:

 HLT: Halt the microprocessor when the loop is completed.

5. State Three Intel 8085 Microprocessor Software Interrupts.

There are five interrupt signals in the 8085 microprocessor:

1. TRAP: The TRAP interrupt is a non-maskable interrupt that is generated by an external

device, such as a power failure or a hardware malfunction. The TRAP interrupt has the
highest priority and cannot be disabled.
2. RST 7.5: The RST 7.5 interrupt is a maskable interrupt that is generated by a software
instruction. It has the second-highest priority.
3. RST 6.5: The RST 6.5 interrupt is a maskable interrupt that is generated by a software
instruction. It has the third-highest priority.
4. RST 5.5: The RST 5.5 interrupt is a maskable interrupt that is generated by a software
instruction. It has the fourth-highest priority.
5. INTR: The INTR interrupt is a maskable interrupt that is generated by an external
device, such as a keyboard or a mouse. It has the lowest priority and can be disabled

6. Describe Each Of The Following Interrupt Instructions: (I) SIM: (II) RIM:
(i) SIM (Set Interrupt Mask):
 SIM is used to set the interrupt mask bits and serial output data bit.
 It enables or disables the RST7.5, RST6.5, and TRAP interrupts.
(ii) RIM (Read Interrupt Mask):
 RIM is used to read the status of the interrupt system.
 It loads various registers with information about the status of interrupt-related
flags, such as the status of the interrupt lines, serial input data, and the status of
the SID (Serial Input Data) and SOD (Serial Output Data) pins.

7. With Aid Of A Flowchart, Describe The Polling Method Of Interrupt Service.

The polling method of interrupt service is a technique used by microprocessors to check the
status of I/O devices every so often. During this check, the microprocessor tests to see if any
device needs servicing. The flowchart for the polling subroutine is shown below
8. Write An 8085 Microprocessor Assembly Language Program To Generate A
Triangular Wave At Port COH
ORG 4000H ; Set the origin address

MOV C, #00H ; Initialize the port C value

MOV B, #01H ; Initialize the increment value

TRIANGLE: ; Label for the triangular wave generation loop

 OUT C0H ; Output the current value to port C0H
INX C ; Increment the port C value

CMP B, #0AH ; Compare the current increment value with 10

JZ REVERSE ; If equal, reverse the direction of the wave

JMP TRIANGLE ; Jump back to the TRIANGLE label

REVERSE: ; Label to reverse the direction of the wave

DCX C ; Decrement the port C value

CMP B, #01H ; Compare the current decrement value with 1

JZ TRIANGLE ; If equal, jump back to the TRIANGLE label

JMP REVERSE ; Jump back to the REVERSE label

Explanation:
1. Initialization:
 MOV C, #00H: Initialize the port C value to 00H.
 MOV B, #01H: Initialize the increment value to 01H.
2. Triangular Wave Generation Loop (TRIANGLE):
 OUT C0H: Output the current value to port C0H, generating a triangular wave.
 INX C: Increment the port C value.
 CMP B, #0AH: Compare the current increment value with 10.
 JZ REVERSE: If equal, jump to the REVERSE label.
3. Reverse Direction (REVERSE):
 DCX C: Decrement the port C value.
 CMP B, #01H: Compare the current decrement value with 1.
 JZ TRIANGLE: If equal, jump back to the TRIANGLE label.
 JMP REVERSE: Jump back to the REVERSE label.

9. Describe Each Of The Following Addressing Modes Citing An Example Of An

Instruction In Each Case:
i. Implicit:
ii. Register Indirect:
iii. Direct:

Implicit Addressing Mode:

In the implicit addressing mode, the operand is implied or understood, and no explicit address or
operand is specified in the instruction. The instruction implicitly operates on some predefined
data or register. Example: Consider the HLT instruction in the Intel 8085 assembly language. It
is an example of the implicit addressing mode. The HLT instruction stands for Halt, and it
doesn't require any operand. It implicitly instructs the microprocessor to halt its operation.

Register Indirect Addressing Mode:

In register indirect addressing mode, the effective address of the operand is held in a register.
The instruction specifies the register, and the data at the memory location pointed to by that
register is the operand. Example: The MOV instruction can use register indirect addressing. For
instance, MOV A, M copies the content of the memory location pointed to by the HL register
pair into register A.

Direct Addressing Mode:

In direct addressing mode, the operand's address is directly specified in the instruction. The data
to be operated on is directly fetched from or stored to the specified memory address. Example:
The `LDA` (Load Accumulator) instruction in the Intel 8085 assembly language uses direct
addressing. It loads the accumulator with the data from a specific memory address. LDA 3000H;
Load the accumulator with the content at memory address 3000H (direct addressing)

Note that there are 5 addressing modes in 8085 make sure you know all 5 with examples:
immediate addressing mode, stack addressing mode etc.

10. With Aid Of A Block Diagram, Describe The Direct Memory Access (DMA) Method
Of Data Transfer.

Direct Memory Access (DMA) is a method of data transfer that allows peripheral devices to
access the system memory directly without the intervention of the CPU. This method is useful
for transferring large amounts of data between memory and peripheral devices, such as hard
drives, without burdening the CPU.
 11. State Two Demerits If I/O-Mapped Input-Output Technique.

Limited Address Space: I/O-mapped I/O dedicates a specific address space for I/O operations.
This can limit the available address space for memory, especially in systems with a small address
range, potentially restricting the amount of addressable memory.

Instruction Complexity: I/O-mapped I/O typically requires specific instructions or instructions

with additional bits to distinguish between memory and I/O operations. This can result in
increased complexity in the instruction set architecture and may slow down the overall
instruction execution time.

12. Describe each of the following tools used in assembly language programming:
(i) Assembler; (ii) Compiler.

(i) Assembler:

 Purpose: Translates assembly language code into machine code.

 Output: Produces machine code or an object file.
 Function: Converts human-readable assembly code to machine-readable code.
 Example: NASM (Netwide Assembler), MASM (Microsoft Assembler).

(ii) Compiler:

 Purpose: Translates high-level programming language code into machine code.

 Output: Generates executable files or binaries.
 Function: Converts source code written in a high-level language (e.g., C, C++) into
machine code.
 Example: GCC (GNU Compiler Collection), Microsoft Visual C++ Compiler.

13. With Aid Of A Block Diagram, Describe The Operation Of A Signature Analyzer.

A signature analyzer is a device that is used to detect faults in digital circuits. It works by
converting a train of pulses at the test point into a recognizable form such as a hexadecimal
number, which is called a "signature". The signature analyzer then compares this signature with
the expected signature of a healthy circuit to identify the fault The block diagram of a signature
analyzer is shown below:
 14. Write A Program To Test Ten RAM Memory Locations Starting At 4000 H

ORG 4000H ; Set the origin address to 4000H

START: ; Start of the program

MVI B, 0AH ; Initialize loop counter to 10 (0AH in hexadecimal)

LXI H, 4000H ; Initialize HL register pair with the starting address (4000H)

TEST_LOOP:

MOV A, M ; Move the content of the memory location pointed to by HL into register A

CMP B ; Compare with the loop counter

JZ END_TEST ; Jump to END_TEST if the loop counter is zero

CALL DISPLAY ; Call a subroutine to display the content of the memory location

INX H ; Increment the memory address

DCR B ; Decrement the loop counter

JMP TEST_LOOP ; Jump back to TEST_LOOP

HLT ; Halt the microprocessor

 15. State 2 Signals Used In Direct Memory Access (DMA).

Two control signals are used to request and acknowledge a DMA transfer in the microprocessor-
based system. The HOLD signal is a bus request signal which asks the microprocessor to
release control of the buses after the current bus cycle.

The HLDA signal is a bus grant signal which indicates that the microprocessor has indeed
released control of its buses by placing the buses at their high- impedance states.

Or you can say, two signals used in Direct Memory Access (DMA) are DMA request and DMA
acknowledge.

16. Draw A Flowchart For A Program That Adds Even Numbers Less Than 20 And
Outputs The Results At PORT 1.
 17. State Two Defining Features Of Each Of The Following Input/Output (I/O)
Techniques: (I)Memory Mapped, (Ii) I/O Mapped

(i) Memory-Mapped I/O:

1. Address Space Integration: I/O devices share the same address space as memory.
Advantage: Simplifies addressing, as both memory and I/O devices use the same set of
addresses.
2. Read/Write Instructions: I/O operations are performed using regular load and store
instructions. Advantage: Uniformity in instruction set simplifies programming.

(ii) I/O-Mapped I/O:

1. Separate Address Spaces: I/O devices have different address spaces from memory.
Advantage: Allows dedicated addressing for I/O operations, reducing potential conflicts.
2. Specialized I/O Instructions: Specific I/O instructions (IN and OUT) are used for data
transfer. Advantage: Provides different instructions for I/O operations, minimizing
confusion with memory operations.

18. Write An Intel 8085 Program To Perform The Following: 2789 + 3273

ORG 2000H ; Set the origin address to 2000H

MVI B, 27H ; Load the first operand (27H) into register B

MVI C, 89H ; Load the second operand (89H) into register C

MVI D, 32H ; Load the third operand (32H) into register D

MVI E, 73H ; Load the fourth operand (73H) into register E

MOV A, B ; Copy the first operand to register A

ADD C ; Add the second operand to A

MOV L, A ; Store the least significant byte of the result in register L

MOV A, D ; Copy the third operand to register A

ADD E ; Add the fourth operand to A

MOV H, A ; Store the most significant byte of the result in register H

HLT ; Halt the microprocessor

19. Write An Intel 8085 Program To Perform The Following:
Y= (11010011)2NAND(11101100)2

ORG 2000H ; Set the origin address to 2000H

MVI A, 11010011B ; Load the first binary number into register A

MVI B, 11101100B ; Load the second binary number into register B

CMA ; Perform one's complement on A

ANA B ; Perform AND operation with B

MOV L, A ; Store the result in register L

HLT ; Halt the microprocessor

20. Write An Intel 8085 Program To Perform The Following: (00000110)2 × (1100)2
ORG 2000H ; Set the origin address to 2000H

MVI B, 00000110B ; Load the first binary number into register B

MVI C, 00001100B ; Load the second binary number into register C

MOV A, B ; Copy the first binary number to register A

MOV D, A ; Copy the first binary number to register D for multiplication

MOV E, C ; Copy the second binary number to register E for multiplication

MVI H, 00H ; Initialize the result high byte to 00H

MVI L, 00H ; Initialize the result low byte to 00H

MULT_LOOP: ; Multiplication loop

MOV A, D ; Copy the multiplier (D) to A
RLC ; Rotate A left through the carry
MOV D, A ; Save the rotated value back to D

MOV A, L ; Copy the low byte of the result to A

RLC ; Rotate A left through the carry
MOV L, A ; Save the rotated value back to the low byte

MOV A, H ; Copy the high byte of the result to A

RLC ; Rotate A left through the carry
MOV H, A ; Save the rotated value back to the high byte

MOV A, E ; Copy the multiplicand (E) to A

MOV B, A ; Copy the multiplicand to B
 MOV A, L ; Copy the low byte of the result to A
ADD B ; Add the multiplicand
MOV L, A ; Save the result to the low byte

MOV A, H ; Copy the high byte of the result to A

ADC 00 ; Add with carry (add carry to the high byte)
MOV H, A ; Save the result to the high byte

DCR C ; Decrement the counter

JNZ MULT_LOOP ; Jump back to the multiplication loop if not zero

HLT ; Halt the microprocessor

21. Table Below Shows Part Of A Microprocessor Instruction Set.

The instructions can be decoded as follows:

Instruction Meaning
ADD A, D A + D to A (The results of regA and regD are
stored in regA)
MUL D A × D to A (The results of A multiplied by D
are kept in A)
MUL A A × A to A (Contents in A are multiplied by
contents in A and the results is kept in reg A)
MOV D, A A to D (contents in reg A are transferred to D)
MOV A, DATA DATA to A (Data is transferred to reg A)
END Halt program
ORG 2000H ; Set the origin address to 2000H

; Assuming x is already in register A

; Calculate x2

MUL A ; A × A to A

; Save x2 to register D

MOV D, A ; A to D

; Calculate x4

MUL D ; A × D to A

END ; Halt program

ORG 2000H ; Set the origin address to 2000H

; Assuming x is already in register A

; Multiply x by 8

MOV B, 08H ; Load constant 8 (DATA) into register B/ MOV B, DATA

MUL B ; A × B to A

END ; Halt program

22. Write An Assembly Language Program, Using Stack Operations, To Exchange Data
Between Register Pairs BC And DE

ORG 2000H ; Set the origin address to 2000H

; Initialize data in register pairs BC and DE

MVI B, 23H ; Load data into register B

MVI C, 45H ; Load data into register C

MVI D, 67H ; Load data into register D

MVI E, 89H ; Load data into register E

; Push BC onto the stack

PUSH B

PUSH C

; Push DE onto the stack

PUSH D

PUSH E

; Pop BC from the stack to exchange data

POP E

POP D

; Pop DE from the stack to exchange data

POP C

POP B

HLT ; Halt the microprocessor

Make sure you read more about stack operations: PUSH and POP

23. With the aid of a flowchart, write an assembly language program to search byte
'btey' from a block of consecutive memory locations, which is 256 bytes long, and
report the number of occurrences of the byte. The starting address of the memory
block is 2000h

ORG 2000H ; Set the origin address to 2000H

MVI C, 04H ; Set the length of the search byte 'BTEY' (4 bytes)

MVI B, 'B' ; Set the first byte of the search byte

MVI H, 20H ; Set the starting address of the memory block to 2000H

MVI L, 00H ; Initialize the low byte of the memory address

MVI D, 00H ; Initialize the counter for occurrences

SEARCH_LOOP:

MOV A, M ; Load the current byte from memory to register A

CPI B ; Compare with the first byte of the search byte

JZ CHECK_NEXT_BYTES ; Jump to CHECK_NEXT_BYTES if it matches

JMP NEXT_LOCATION ; Jump to NEXT_LOCATION to move to the next byte

CHECK_NEXT_BYTES:

INX H ; Move to the next byte in the block

MOV A, M ; Load the next byte from memory to register A

CPI 'T' ; Compare with the second byte of the search byte

JZ CHECK_THIRD_BYTE ; Jump to CHECK_THIRD_BYTE if it matches

JMP NEXT_LOCATION ; Jump to NEXT_LOCATION if it doesn't match

CHECK_THIRD_BYTE:

INX H ; Move to the next byte in the block

MOV A, M ; Load the next byte from memory to register A

CPI 'E' ; Compare with the third byte of the search byte

JZ CHECK_FOURTH_BYTE ; Jump to CHECK_FOURTH_BYTE if it matches

JMP NEXT_LOCATION ; Jump to NEXT_LOCATION if it doesn't match

CHECK_FOURTH_BYTE:

INX H ; Move to the next byte in the block

MOV A, M ; Load the next byte from memory to register A

 CPI 'Y' ; Compare with the fourth byte of the search byte

JZ INCREMENT_COUNT ; Jump to INCREMENT_COUNT if it matches

JMP NEXT_LOCATION ; Jump to NEXT_LOCATION if it doesn't match

INCREMENT_COUNT:

INX D ; Increment the count of occurrences

NEXT_LOCATION:

INX L ; Move to the next memory location within the block

DCR C ; Decrement the search byte length

JNZ SEARCH_LOOP ; Jump back to SEARCH_LOOP if there are more bytes to check

HLT ; Halt the program.

You can follow the guidelines of drawing a flowchart to draw the flowchart for the
program above.

24. List the purpose of signals INTA, INTR, IR0 to IR7 of the pins of 8085
microprocessor and a device each signal would be connected to.

INTA (Interrupt Acknowledge): Acknowledges the interrupt request from an external device.
Connected to an external interrupt controller (e.g., 8259) that manages multiple interrupt
sources.

INTR (Interrupt Request): Requests interrupt service from the microprocessor. Connected to
devices generating interrupts, such as peripheral devices requiring immediate attention.

IR0 to IR7 (Interrupt Request 0 to 7): Represent individual interrupt request lines for
prioritized interrupt handling. Connected to devices generating specific priority-level interrupts,
such as high-priority peripherals or external interrupt controllers.

Make sure to know the functions of all the 40 pins of the 8085.
 25. State Two Tests That Can Be Carried Out On A Microprocessor System Using Each
Of The Following Equipment: Multimeter, Oscilloscope, Logic Analyzer

Multimeter:

1. Continuity Test:
 Check for continuity in the power supply lines and ground connections on the
microprocessor system. Ensure that there are no open circuits or breaks in the
connections.
2. Voltage Measurement:
 Measure the voltages at key points on the microprocessor board, such as power
supply pins and clock signal lines. Ensure that the voltages are within the
specified operating range.

Oscilloscope:

1. Clock Signal Verification:

 Connect the oscilloscope probe to the clock signal line of the microprocessor.
Verify the frequency, amplitude, and stability of the clock signal to ensure proper
timing for the system.
2. Data Bus Monitoring:
 Connect the oscilloscope to the data bus lines of the microprocessor. Monitor the
data signals during read and write operations to check for signal integrity, proper
timing, and absence of noise.

Logic Analyzer:

1. Address Bus Analysis:

 Connect the logic analyzer probes to the address bus lines. Capture and analyze
address bus signals during program execution to ensure correct addressing and
memory access.
2. Interrupt Signal Verification:
 Connect the logic analyzer to the interrupt lines (e.g., INTR). Capture and analyze
interrupt signals during interrupt-driven operations to verify proper triggering and
handling of interrupts in the microprocessor system.

Performing these tests helps ensure the proper functioning of a microprocessor system,
identifying issues related to continuity, voltage levels, timing signals, and data integrity.
 26. Outline The Checksum Method Of Testing A Microcomputer Random Access
Memory

To test a microcomputer random access memory (RAM) using the checksum method, the
following steps can be taken:

1) Write a program that generates a sequence of bytes to be stored in the RAM.

2) Compute the checksum value of the sequence of bytes.
3) Store the sequence of bytes and the checksum value in the RAM.
4) Read the sequence of bytes and the checksum value from the RAM.
5) Recompute the checksum value of the sequence of bytes.
6) Compare the recomputed checksum value with the stored checksum value. If they
match, the data is assumed to be error-free.

27. What is the shortcoming/limitation of the above method?

It can detect errors but does not provide a mechanism for correcting them. If a single-bit error
occurs, the checksum method can identify the discrepancy but lacks the ability to pinpoint and
correct the specific error.

28. The table below shows an 8085 assembly language program listing, draw a trace
table of the program execution.
A trace table records the state of registers and memory at each step of program execution.

| Address | Mnemonic | Operand | A | B | C | D | E | H | L | SP | Flags |

|---------|-----------|---------|-------|-------|-------|-------|-------|-------|-------|--------|-------|

| | LXI | SP | | | | | | F0 | 00 | F000H | SZAC |

| F000H | LXI | H | | | | 80 | 40 | F0 | 00 | F000H | SZAC |

| F003H | MVI | A | 35 | | | 80 | 40 | F0 | 00 | F000H | SZAC |

| F005H | ADI | 18H | 4D | | | 80 | 40 | F0 | 00 | F000H | SZAC |

| F007H | MOV | M | 4D | | | 80 | 40 | F0 | 00 | F000H | SZAC |

| F008H | ADD | M | 9A | | | 80 | 40 | F0 | 00 | F000H | SZAC |

| F009H | LXI | B | 9A | 80 | | 80 | 40 | F0 | 00 | F000H | SZAC |

| F00CH | STAX | B | 9A | 9A | | 80 | 40 | F0 | 00 | F002H | SZAC |

| F00DH | XRA | A | 00 | 9A | | 80 | 40 | F0 | 00 | F002H | SZAC |

| F00EH | INX | B | 00 | 9A | | 80 | 40 | F0 | 00 | F002H | SZAC |

| F00FH | STAX | B | 00 | 9A | | 80 | 40 | F0 | 00 | F004H | SZAC |

| F010H | ADD | B | 9A | 9A | | 80 | 40 | F0 | 00 | F004H | SZAC |

| F011H | MOV | C | 34 | 9A | | 80 | 40 | F0 | 00 | F004H | SZAC |

| F013H | HLT | | 34 | 9A | 34 | 80 | 40 | F0 | 00 | F004H | SZAC |

 29. With the aid of a diagram, explain the use of an in-circuit emulator (ICE) in the
development of a microprocessor-based system.

An in-circuit emulator (ICE) is a hardware device used to debug the software of an

embedded system. It operates by using a processor with the additional ability to support
debugging operations, as well as to carry out the main function of the system. The primary
function of an ICE is to provide a window into the embedded system. The programmer uses
the emulator to load programs into the embedded system, run them, step through them
slowly, and view and change data used by the system's software. An emulator gets its name
because it emulates (imitates) the central processing unit (CPU) of the embedded system's
computer.

30. Explain The Activities In Each Of The Following Microprocessor System

Development Stages:
i. Schematic Capture
ii. Simulation And Timing Verification
iii. Components, Libraries And Packages
iv. Printed Circuit Board (PCB) Layout

i. Schematic Capture:

 Define system architecture and components.

 Create a visual schematic representation of the microprocessor system, connecting
components and signaling paths.

ii. Simulation and Timing Verification:

 Use simulation tools to model circuit behavior.

 Verify timing, analyze signal responses, and simulate system functionality.

iii. Components, Libraries, and Packages:

 Develop a comprehensive component library.

 Define packages, footprints, and electrical characteristics for accurate representation.
iv. Printed Circuit Board (PCB) Layout:

 Place components on the PCB and route traces.

 Design power and ground planes, perform a Design Rule Check, and generate
manufacturing outputs for PCB fabrication.

31. Describe typical features of each of the following types of operating systems;
i. Real time
ii. Network
iii. Batch

i. Real-Time Operating System (RTOS):

 Deterministic Response:
 Provides predictable and guaranteed response times for critical tasks.
 Task Scheduling:
 Prioritizes and schedules tasks based on urgency.
 Low Latency:
 Minimizes response time to external events.
 Concurrency:
 Supports concurrent execution of real-time processes.

ii. Network Operating System:

 Distributed Computing:
 Facilitates communication and resource sharing across a network.
 User Authentication:
 Manages user authentication and access control.
 Resource Sharing:
 Enables sharing of files and resources among networked computers.
 Centralized Management:
 Provides centralized tools for network administration.

iii. Batch Operating System:

 Batch Processing:
 Executes a series of jobs without manual intervention.
 Job Scheduling:
 Orders and schedules jobs based on priorities.
 No User Interaction:
 Operates without direct user interaction during execution.
 Efficient Resource Utilization:
 Maximizes resource utilization by processing multiple jobs sequentially.
 32. Define each of the following with respect to microprocessors:
i. Bus
ii. Word length

i. Bus: A communication pathway that transfers data between components of a microprocessor

or between microprocessors and peripherals. Types: Includes data bus (for data transfer),
address bus (for specifying memory locations), and control bus (for coordinating activities).

ii. Word Length: The number of bits processed in parallel by a microprocessor in a single
operation or instruction. Example: A microprocessor with a 16-bit word length can process data
in 16-bit chunks in a single operation.

33. Describe each of the following microprocessor registers:

i. Program counter (PC)
ii. Accumulator

i. Program Counter (PC):

 Role: Keeps track of the memory address of the next instruction to be fetched and
executed.
 Function: Guides the microprocessor through the sequential execution of instructions in
a program.
 Importance: Crucial for the flow control and sequencing of program execution.

ii. Accumulator:

 Role: A register that performs arithmetic and logic operations, typically storing the
results temporarily.
 Function: Central in arithmetic calculations, comparisons, and other mathematical
operations.
 Importance: Often used as a primary working register for intermediate data storage
during computation.

Make sure you know how to describe all the registers of 8085
 34. Four bytes of data are stored in consecutive memory locations 3500H to 3503H.
Write an assembly language program to add the data and store the result at
memory location 3504H to 3505H starting with the lower byte.

ORG 3000H ; Assume starting address

MVI H, 35H ; Initialize H register with the high byte of the source address

MVI L, 00H ; Initialize L register with the low byte of the source address

MOV D, M ; Load the first data byte to register D

INX H ; Increment the source address

MOV E, M ; Load the second data byte to register E

INX H ; Increment the source address

MOV B, M ; Load the third data byte to register B

INX H ; Increment the source address

MOV C, M ; Load the fourth data byte to register C

; Add the bytes in pairs

MOV A, D ; Transfer the first byte to accumulator

ADD E ; Add the second byte

MOV L, A ; Store the lower byte of the result in register L

MOV A, B ; Transfer the third byte to accumulator

ADD C ; Add the fourth byte

MOV H, A ; Store the higher byte of the result in register H

; Store the result at memory locations 3504H to 3505H

MVI H, 35H ; Initialize H register with the high byte of the destination address

MVI L, 04H ; Initialize L register with the low byte of the destination address
MOV M, L ; Store the lower byte of the result

INX H ; Increment the destination address

MOV M, H ; Store the higher byte of the result

HLT ; Halt the program

35. The accumulator contains data CH4. Determine the contents of the accumulator
after each of the following shift operations:
(i) Arithmetic right shift;
(ii) Logical right shift

Accumulator Contents: CH4 (Assuming hexadecimal notation)

i. Arithmetic Right Shift:

1. Initial State:
 AH = C, AL = H
2. After Arithmetic Right Shift:
 AH = E (shifted from C), AL = C (shifted from H)
3. Result:
 Accumulator Contents: EC4

ii. Logical Right Shift:

1. Initial State:
 AH = C, AL = H
2. After Logical Right Shift:
 AH = 6 (shifted from C), AL = 4 (shifted from H)
3. Result:
 Accumulator Contents: 64
 36. Describe the page zero addressing mode of microprocessors using an example

The zero page addressing mode is a type of addressing mode used in microprocessors. It is
used to specify an address in the first 256 bytes of RAM where data which has been loaded into a
specific register may be located

LDA $10 ; Load the accumulator with the content of memory location $0010 (page zero
addressing)

STA $20 ; Store the content of the accumulator into memory location $0020 (page zero
addressing)

37. State 3 advantages of assembly language over machine language programming

i. Human Readability: Assembly language provides mnemonic instructions and symbolic
representations, making the code more readable and understandable for programmers
compared to raw machine language.
ii. Simplified Coding: Assembly language allows the use of symbolic names for memory
locations and operations, reducing the complexity and effort required for programming
compared to directly dealing with binary instructions.
iii. Portability and Maintainability: Assembly language programs are more portable and
easier to maintain than machine language, as changes in the underlying hardware
architecture may only require modifications to specific sections of the code rather than a
complete rewrite.

38. With the aid of a flow chart describe handshaking input output data transfer
Handshaking is a method used to synchronize I/O devices with the microprocessor. It
involves exchanging signals between the I/O device and the microprocessor before data
transfer takes place.
The handshaking process involves two signals: data valid, which is created by the source
unit, and data accepted, created by the destination unit
 39. State 2 reasons of disabling buffers when not in use

Power Conservation: Disabling buffers reduces power consumption, especially in scenarios

where a system or a device is operating in a low-power or idle state. By deactivating buffers that
are not actively transmitting or receiving data, energy consumption is minimized, contributing to
improved overall power efficiency.

Signal Integrity: When buffers are not actively driving or receiving signals, leaving them
disabled prevents unnecessary loading or interference on the communication lines. This helps
maintain signal integrity by avoiding unintended effects such as reflections, crosstalk, or other
forms of signal degradation that might occur if the buffers were left active without a purpose.

40. With the aid of a diagram, describe the operation of tri-state buffer

A tri-state buffer is a digital circuit that can be in one of three states: high, low, or high
impedance (disconnected). It has three inputs: a data input, an enable input, and an output.

When the enable input is high, the output follows the data input.

When the enable input is low, the output is disconnected from the data input and goes into a
high-impedance state.

This allows multiple devices to share the same data bus without interfering with each other.
41. The table below shows instruction listing of a delay program. The clock frequency is
5 MHz
Label Mnemonic T-States
LXI B, 10
1000H
LOOP DCX B 6
XTH L 16
XTH L 16
NOP 4
NOP 4
MOV A, B 4
ORA C 4
JNZ LOOP 10/7
HLT 5

Determine the:
i. Program delay time;
ii. Number of memory locations occupied by the machine code program
 42. State 4 functions of interface modules of a microprocessor system

Signal Conversion: Interface modules convert signals between the microprocessor and
external devices, ensuring compatibility between different voltage levels and communication
protocols.

Data Buffering: They provide buffering functions to isolate and stabilize data flow,
preventing signal degradation and ensuring reliable communication between the
microprocessor and peripherals.

Control and Timing: Interface modules manage control signals and timing synchronization,
facilitating coordinated interactions between the microprocessor and connected devices.

Peripheral Connectivity: They enable connectivity to various peripherals by providing

standardized interfaces, allowing the microprocessor to communicate with a diverse range of
external devices.

43. With the aid of a flowchart, describe microcomputer development cycle

Conceptualization: Define the system requirements and functionalities.

Design: Create a detailed architecture, including hardware and software components.

Implementation: Build the microcomputer system based on the design specifications.

Testing: Verify and validate the system's functionality and performance.

Integration: Combine hardware and software components to create a cohesive microcomputer

system.

Deployment: Release the microcomputer system for use.

Maintenance: Provide ongoing support, updates, and improvements as needed.