Digital CMOS VLSI Design
Prof. Ankesh Jain
Department of Electrical Engineering
Indian Institute of Technology
Delhi, India
Switch
➢ A transistor behaves like a unilateral device
➢ Input terminal are Gate and source
➢ Output terminals are Drain and source
➢ Its input impedance is high
➢ VGS is used as an input
➢ IDS is its output
Switch
➢ If it operates in saturation region
➢ Its output impedance is high if seen from drain
➢ It’s a voltage controlled current source (VCCS)
➢ Its output impedance is low if seen from source
➢ Drain is assumed to be connected to Small signal ground
Switch
➢ A transistor if operated in linear region
➢ behaves like a resistor
➢ High overdrive results in low resistance value
2
𝐼𝐷𝑆,𝑙𝑖𝑛𝑒𝑎𝑟 = β 2 𝑉𝐺𝑆 − 𝑉𝑇 𝑉𝐷𝑆 − 𝑉𝐷𝑆 𝑉𝐷𝑆 < 𝑉𝐺𝑆 − 𝑉𝑇
➢ If VGS is high
➢ Drain and source voltages are nearly same
➢ If VGS is less than threshold voltage
➢ Drain is not connected to source terminal
Inverter
➢ Inverter is a circuit which invertes the logic
➢ Converts logic high at its input into logic low at its output
➢ Converts logic low at its input into logic high at its output
Inverter
➢ The lower output level is defined as
𝑉𝑂𝐿 = 𝑉𝐷𝐷 − 𝐼𝑅
➢ The higher output level is defined as
𝑉𝑂𝐻 = 𝑉𝐷𝐷
➢ Design choices are R and W/L of the transistor
➢ VOL should be less than threshold voltage
Design of NMOS Inverter
➢ 𝑉𝑂𝐻 = 𝑉𝐷𝐷 = 1𝑉 and 𝑉𝑂𝐿 = 0.2𝑉 and 𝑃𝐷 = 0.2𝑚𝑊
𝑃𝐷 0.2𝑚𝑊
➢ 𝐼= = = 0.2𝑚𝐴
𝑉𝐷𝐷 1𝑉
➢ When transistor is on, it will be in triode region
2
𝐼𝐷𝑆,𝑙𝑖𝑛𝑒𝑎𝑟 = β 2 𝑉𝐺𝑆 − 𝑉𝑇 𝑉𝐷𝑆 − 𝑉𝐷𝑆
0.2𝑚 = β 2 1 − 0.4 0.2 − 0.04
0.2𝑚 = β 0.24 − 0.04
0.2𝑚 = β 0.20
β = 1𝑚
Design of NMOS Inverter
𝑛 𝐶𝑜𝑥 = 100A/𝑉 2
𝑊 β 1𝑚𝐴/𝑉 2
= = = 10
𝐿 𝑛 𝐶𝑜𝑥 100A/𝑉 2
