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18 views117 pagesSP Midterm Material
system programming
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
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1.3 The Simplified Instructional Computer (SIC)
Like many other products, SIC comes in two versions: the standard model
and an XE version (XE stands for “extra equipment,” or perhaps “extra expen-
sive"). The two versions have been designed to be lipivard compatiblé—that is,
an object program for the standard SIC machine will also execute properly on
a SIC/XE system. (Such upward compatibility is often found on real comput-,
ers that are closely related to one another.) Section 1.3.1 summarizes the stan-
dard features of SIC. Section 1.3.2 describes the additional features that are
included in SIC/XE. Section 1.3.3 presents simple examples of SIC and
SIC/XE programming. These examples are intended to help you become more
familiar with the SIC and SIC/XE instruction sets and assembler language.
Practice exercises in SIC and SIC/XE programming can be found at the end of
this chapter.
1.3.1. SIC Machine Architecture
‘Memory
Memory consists of 8-bit bytes; any 3 consecutive bytes form a word (24 bits).
All addresses on SIC are byte addresses; words are addressed by the location
of their lowest numbered byte, There are a total of 32,768 (215) bytes in the
= ae
computer memory.
Registers!
‘There are five registers, all of which have special uses. Each register is 24 bits
in length. The following table indicates the numbers, mnemonics, and uses of
these registers. (The numbering scheme has been chosen for compatibility
with the XE version of SIC.)
Mnemonic Number __ Special use
A fol Accumulator; used for arithmetic operations |
xi w Index register; used for addressing Bev obs .
L {2 Linkage register; the Jump to Subroutine (SUB) ae
fe wee fis pe par aneaaoeaa the return address si ah it “cs
Pc a Program counter; contains the address ofthe 7} eeysi’ &
next instruction {be fetched for execution wv
sw 5) Status word; contains a variety of PMNS Ease
information, including a Condition Code (CC)
Roge 503 “Appenddy 0” po Svmasiben 4c boykes eouh = 24 bis) ~
—s aiover of wereld aeeciaeact eat,
sa
i
= supe wil Pei
A ht toecbine, Sy pte oS eg
2ooo TSU FUL <> PC = 2003
Qeo3 8 fe 2idsh
Root --- \ OL = oie 2o03 ©
al a2 | P= Sece af
| nak fads bs be. falck =
Ly5e00 UWS _| Jean
\ a 7 ~ ;
f
Ae UC
Lig rerun |
7
Se :
‘ Problem lin Huis ouch. ¢ Fash ne level of calli ner
po “Me vecutsion |
BIC Mic 2 Dose tick suppor pecusision, suulli WM Panes
suena ee" because bheve is ne chuck a
* pW ( 8 bebus werd” coe ly sey. tt Plage Jt su "age S i ee. Plodkiy qk > cele sale Ele oe = Bip ek
Le FD SP? ovtees Sa EI BIN 852 hh ewe
\c, dunluas 24
Q Feb, wee
> Cnsliuchian Forme 2
ty Pixed Pormak= all_ind’s ove 24-bik Pprimak 1° 3 boufes”
‘SNS PSE eoesss sped gy
cP Ay.
|
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r
i 2. Sep
Z
; a a : ft
p (I : 6
> 5
PW pus, of b>
enemy se it. KB ap ZS
1.16) Bil Parole cesien
eech ots tt Hee _mem.
- = SS fF
yk Ks oR tg ellen maddest 2" Valine x >: iv KES) 9 eee
—b Mabiedalag ob accessing the. sperm |
——— seieaalt weg oP igtheg apeteveed
x ele. Lavette dll aden in SkCowch:
/ Dive Re Trdlexecl Table peso 6
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a WE BUM sto Sb Ace. J
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A Sa EN mem I Qeaesordyer Gil SoA Amer Iyeilee copblca 31% 4
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The COMP inshinckion “nee Yigeul’ poh aches talse? abt AS —
by ComPowes_b/d_a_wwvel_tin_A_veqes ber awed
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on _CC_[ The. Corslibion Cocle_in Nae sus
se fualzata 2 ol at a {
dy Uncoredtioud = TT. spa i
ms ha eer oH Ac 22 ~
ds T SUA + Sip bo subi “pus coho adele in Le fag?
hy sR 1 Retin ba sibrin jumps bo ade conboinch in Le Ag
pTinpuk: Be: oulpul's 2 one |
eS a ee byke abo Live
ek From /Ta vig mec pack othe accurmubsbar |
vighvwesh ovb. device
oleae Bellng. press “ns T/e
ee
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Eats ed
Chapter 1 Background
vhs,
Data Formats what sel* pus ache Supp
as 24-bit binary ™
values. Characters
no floating-P'
umbers; 2's complement rept
are stored using their 8-bit
joint hardware on the standy
Integers are stored
used for negative :
(see Appendix B). There is
of SIC. Bey vleg WW bow
ES Sa Uy Ploswor MMe yo ue Cfo 0s) oF ippoore| oie e
Instruction Formats) «pis la ohn
All machine instructions on the standard version of SIC have the
24-bit format:
8 15
=|
The flag bit x is used to indicate indexed-addressing mode.
Addressing Modes
There are two addressing modes available, indicated by the setting oft
in the instruction. The following table describes how the target address
lated from the address given in the instruction. Parentheses are used!
cate the contents of a register or a memory location. For examp
represents the contents of register X.
: Mode Indicatioy ‘
tah Wy EB ape cls Rn _Tenget evrese coleustcn
Syl oe insh: Sy 298 Ow), ‘ Bo TA =addres§
Suelo inshe Wy 2x Oe d
” * Indexed e1 TA = address +
ae Bee
Rey X 0 obese
C OS Wsh Povmab Ue Lot 0 bee
Instruction Set) 6Ov = — i
. Ws otk wecte | 2 fvocessor Ul
tt
WVR2 Ie TA ig ew?
SIC provider basi set of instriictions that are sufficient for most #
einai instructions that load and store registers (LDA, LDY
IX, etc.), as well as integer arithmetic operations (ADD, SUB, MUL, D!
arithmetic operations involve register A and a word in memory, with the!
being left in the register. There is an instruction (COMP) that compa
value in register A with a word in memory; this instruction sets a condiltt
est) indicate the result (<=, oF >). Conditional jump instructions QP
) can test the setting of CC, and jump accordingly. Two instructio® 1.3. The Simplified Instructional Computer (SIC)
provided for subroutine linkage, JSUB jumps to the subroutine, placing the
return address in register L; RSUB returns by jumping to the address con-
tained in register L. *
Appendix A gives a complete list of all SIC (and SIC/XE) instructions, with
their operation codes and a specification of the function performed by each.
Input and Output
On the standard version of SIC, input and output are performed by transfer-
ring 1 byte at a time to or from the rightmost 8 bits of register A. Each device is
assigned a unique 8-bit code. There are three I/O instructions, each of which
specifies the device code as an operand.
‘The (Test Device (TD) instruction tests. whether the addressed.device is
ready to send or receive a byte of data. The condition codes set to indicate the
result of this test. (A setting of < means the device is ready to send or receive,
and = means the device is not ready.) A program needing to transfer data must
wait until the device is ready, then execute a [Read®Dataj (RD) or Write! Datay
(WD). This sequence must be repeated for each byte of data to be read or writ-
ten. The program shown in Fig. 2.1 (Chapter 2) illustrates this technique for
performing I/O. RD: Reosl Por device > WAR s Write Wo aeice
4.3.2 SIC/XE Machine Architecture
Memory
‘The memory structure for SIC/XE is the same as that previously described for
SIC. However, the maximum memory available on a SIC/XE system is
1 megabyte (220 bytes). This increase leads to a change in instruction formats
and addressing modes.
ceo? busy
: es > realy
Registers © F) stv on bit na vey NE
The following additional registers are provided by SIC/XE:
Mnemonic Number Special use
B 3 Base register; used for addressing,
S 4 General working register—no special F gener porpese =)
T 5 General working register—no special use ;
e 6 Floating-point accumulator Ka Bits) “6 byes" op Sedat be
7 mares! solu
were dt
voces’ WY ule Hw cmpanerl é
Hloukwa 2 gdkhy deel gic WG?
. ywrbers oye 5, F132 SIC/XE Haclrive Avdaikechate +
woe Mpa oh
~1ue * veined fee Performance. t
Ly. 2e lois needed po addves a mem lee.
__ RIC eh Beco 2b df —
— hse. ose : is €
———__> Gemma ¢ e
= Veegeshers ep Ye S10 Shneeratah Sn” I S
a Piece, enghee Vint J aS
oD ago pal 2
i li ui - he 1G) SIC te" s
— tarmalizalion a
—»FPleshing Qrinh, 266. GY3 ——o>_2. 5449U5 & 2 ‘
4 lB 36 NOx |
—— s me e
Ss ai _ _ — |p e@
ae “alles | En rand, = ;
ee All phe _inghrndions ia Se. aye, yew borkiney *
cto
a 616 /XE_ Con upiewel compaliboliby st)
— Adllikionel tng. erable po accommodele pet)
eth insh te Hh ate eh Orch. 9B Ih
bp Peeks 2 AOO ins Worle: on. KC Sic,
A OOE 2 6g insh Ep PiePXE Jeni e
siya hey ta FS inde UY Pofimoks el sic /xe apt tag's a gle)
Caleb SF yscss tach fe. heh ck
fy inet pte a op a
Sat ia Req po Rag, operation”
¢ Te C)e(r)
Ae Table page t
= ata aI rs
op-Cebitl—e, i<
__ApDR SF =9- Assembler >
(objeck code)
Paes Ii? Wish Ji can
Tos
io St wo lb lceu — rt Men. db aie v
* s
mh 7 '
DeeshoF:
ey Pee As sictabder Sy i Bid) oa Sih ct
fad
_xlovger wen. size 0 S1/te” Jeool fo “use_the
ol) i 2
deusing velalive ocblvessiviy “as Provide tin Fovwal 4%
ae using Bllodde as provicle in Formal y - 4 EaGuk3 3 byhes tide © conpabible with ~ Bh ——
SIC inskYucti onss i oe
aatibees lykes papal eic/XE we Iyer CIC 25Gb» Hh —__—
___t* in fde—tie Sols
ICE S>
— $e ‘filet, ee ere it eto
nN
se te hs sie 00-0 “
eS a sual, “ al
oe Bub 6 | i dendSummagticaie :
foo wil Uils BY VIE Jt Bibe wSeit ks” bd pk
JE Ebik 9 opcode Jyat FEN oD yt ot
(2) yA kode Vet) NL bike Se es
apie bal ane tee Big 00 4
ee compai bilibes.
Hes algo menus, Ahok Hee Hitch lbbwacl fbi P|
a. wade tla colerbity the opetbion||
§__(Fewual 3, aes ape Recesor. ene S|}
aes ise Nike. IMP wes
A
1% Formol YH Full oddly » “k Relabive ecldressing 2 reading pacticularodelt os.
0. olisplecement from owolher oad,
Aaa isto fo _oeblyess the opevauel,
= Ta oslo SSi @
7S Spotage* ¢ ae ue pt towel bie Jo cade site Ji aise
ee a hee ie
Juri
= 1
a
= = Oc. yelakive ee. 2. pete ilk
= Q_ B- velaive, 6 veg, Ses oss 8
= |
S S$ lavas eI sfey odcy
— te (eB) rela Mocs Va\ jad 3 ae :
i : ¥ Table Pepe 4 bp Bib op wu
— $C C28). ay ZNDS Lish ve pee '
—) Gisbe ee .
pee tte nth Ga Sy Qa velobive Me ogh
ie 5 PP Lf fran 2 a1 f sor
—_ (esl le «ied | aC) plot! bol 0% de afeloloe vf UT gt
7 Way x b
dd did Data Formats
same data formats as the standard Version
k
SIC/XE provides the ‘
P point data type with the following forma,
there is a 48-bit floating:
a 36
The fraction is interpreted as a value between 0 and 1; that is, thea
nary point is immediately before the high-order bit. For normalize
point numbers, the high-order bit of the fraction must be 1. The g
interpreted as an unsigned binary number between 0 and 2047. It
has value e and the fraction has value f, the absolute value of the ng
resented is
£* 2(e-1024),
The sign of the floating-point number is indicated by the value
positive, 1 = negative). A value of zero is represented by settn
(including sign, exponent, and fraction) to 0.
Instruction Formats:
The larger memory available on SIC/XE means that an address will
eral) no longer fit into a 15-bit field; thus the instruction format use
standard version of SIC is no longer suitable. There are two possibleo
either use some form of relative addressing, or extend the address fi
y bits. Both of these options are included in SIC/XE (Formats 3 and 4i
lowing description). In addition, SIC/XE provides some instructors
not reference memory at all. Form: i i
5 its i
used for such instructions, as |
The new set of instruction fo;
i mats is as follows. The settings of the
F ia e setting
ares ae discussed under Addressing Modes. Bit ¢ is u*
4). Appendix A eee and 4 (¢ = 0 means Format 3, e = 1 means
format to be used with each machine inst™
Format 1 (1 byte): no meng access , jlo Pays ees
8
ae
Ly eprobg
opus 34 + INCA Se he oe
ai os 13. The Simplified Instructional Computer (SIC) 9
whe ny Yb sic Wee
ud hens 7
Format 2 (2 bytes): Rey. tf» Peg operation .
: 4 e&: 2A00R SoT > 4Ta< )
—
fiscal es)
art
ita opeford J) dpi me P#
&, oy su,
a scene obsess 9-7 PRD View
coogi ‘ By odd Yoveee shed
Format 4 (4 bytes): displace
@ 1114101
Ee
Addressing Modes ‘ ewe ce i ght Io
cn)
Two new relative addressing modes are available for use with instructions
assembled using Format 3. These are described in the following table:
operand 3, seit cs
Mode Indication Target address calculation >
Base relative =1,p=0 TA=(B)+disp, (0< disp < 4095)
Program-counter_ b=0,p=1 TA= ero +disp (2048 < disp < 2047)
relative ¥ Broh 4 Civ Patek 2 lee OE bore y pO ar es
oa dese Be ay
For base relative addressing, the displacement field disp in a Format 3 instruc- oes eve
tion is interpreted as a 12-bit unsigned integer. For program-counter relative ad-
dressing, this field is interpreted as a 12-bit signed integer, with negative Aes\ 2D oN & s
values represented in 2’s complement notation. Lig hokes 2 eA)
If bits b and p are both set to 0, the disp field from the Format 3 instruction oi
is taken to be the target address. For a Format 4 instruction, bits b and p are
normally set to 0, and the target address is taken from the address field of the
instruction. We will call this direct addressing, to distinguish it from the rela-
tive addressing modes described above.
Any of these addressing modes can also be combined with indexed ad-
dressing—if bit x is set to 1, the term (X) is added in the target address calcula-
tion. Notice that the standard version of the SIC machine uses only direct
addressing (with or without indexing).
gis je Gilama —y 1 9 indlercol eds veg, k Ost
ler TAs Cec) disp + 4) © TAN?
0 Nok indexed > — no bes |pe
~|-——+8
_aefse et m6 ese. Xs SAC Pace e024} —
8 Ss ee at
= oy nik do “Tk eel ob aiken, sal
odd d laddvd|
= Tan elt {ING | 2 Riess du
je odidia._| t _
Te es std Sil bess Mae
6 1 4 Hochine Tnsnuchion & 9 03/2600 Hex _______—
ep(s) Wi xX b Pe ise oo
[vsee eo ]ififelefvle] eedse_|
23 Sugeasp ed (. as 20 : 2 —
R vnc
>Simple AA
sp opiede 2 00 2 mi Sate REID Po sl ah we
+ Sic Iv opeaihes Je Pulp te ys xe dh J dy
dp ratle ¢$ on0en000 => 0 ffex —______
wi cpeation 3 LOA © Fu yer”
2: s0lo >» X20, b= pol 225
2B e202 forme 3
=) Azo 3 nok incloyesl | SX tvseeceb”
bps hs Pc_celaive es
panes
ly TA 2 (0c) + disp
2003000 + 600 H
7 = 0.0 36 00} © aperwel Jy ILS »
din’ \ga s J ed p24 flachine Inch 2.03 C300
0.3: ‘o0a0 oat, a
G+ dWoole%ed , bod, pr0,e20
=pitso 2 Fotwal 3
=X 24-2 inslexeel f
bp =10_s B - clalive
*
haan,
ly TA = (B) + ohisp s Ge)_
= 096000 1} + Boo H+
_ 2 006$40 "odd of Huo
Ace
ee SS eee
aul elena Tada. yee glam ANT :
7 1 4a
102 3. 9000 cole
Be ni aL ee SIC/XEW 5 Mek im» GARNIER)
UL syasibpegder ai.}0000 00: = 00 Hex => operubion + LDA
2 1 colo .» X=5 , pro ,p21 , e290
S20 8 Fotmwak 2
wk
> Az lbp=of 2 GC. - veubive
Ly TA 2 Cpc) + aie)
= C23ecolly aZoWl
nec BeRel "alle, oP We operand ”
Ac
(A) a lesees tes
eae i ee | de) foie oe oh oT ee Machine Iygh # illo BBO Hen
WB: onon.nogf i pe fe
x nie ol > SIC XE», Simimeligle wd
OPele_241000.0:00.002-» 00 flex -» operabion + LIDA |
Azo + Nok indexeal
bps: Yok velabive:
Ly operand = 030 Mex
Na hl tp afin NC medtcbe |
=>_(A)_= 000 030 Hex xAts 00 > SIG 2
bp a ous LO,
X_S\C_iask. Formals
8
t is
Teo abea
oo
3600 = gpl AllO aco0 one0-
Xx. odelve ss !
er |te30e — (A)! » le Bece ben # nim ll > S1C/XE_@ Hob iim. mek i
pw opcade swOddoyo0O0 oo Her +» LOA |
41 e30el » Keo, bo, pro esd
21 2 Fool U
-y hoot ae Nor marcel
S23] et (A) sce2030 14 Feb, Mon
\
Le:Nbket Cocke is outlined inane cof dhe following leyaukse
L Toa 8 Prous.
:
=e Such as ¢ Ce
;
‘ .
t Fovin ~ 7 ,
: esi sicfxe use Pixeol
’ Zz language lear
: zak gh epecee
: “Sy ? . .
reir pe HABE. 9RCODE.._OPERIND _conMenTs:
: tates FOAN _bosTVey ss 2. ssl cotlenk © Milne
> Hog STA ALPHA Shore im ALPHA
2 : i
: Alfa___Resw_
= FIVE ___wor0. £
= > Setoeet Vinaus gry ite
2
=
= —_& Comprker program c QDATA
oS teed
a CULM Oye EWE, Eble HE ye oP ey Sg
: atti Tnckruchions 2 LOA, JEQ_, --- > Comm A
“me Lt Nei Se
— - WDivecKvel 3 Inclucle int
aii _ START, END... in SIC_| Bic /xe 6
ae ae U Qrocessor JV Ly Commands fo sushemn Sof hale
ay ft assembler ye
oo > eee licen 2 Page ay |
iene END 3 3 Bile ip aspembler vy
oe!
“je, RESB 2 oe eee
fee bykes Jy 50 Yi opereval jeciamalisaia
ie __&£X* VAR, RESR 10
KMS py) dh BE wre BN os Uh |
fe RES Wg Words oot ee > RESR .
> a
he, WORD 8 xi VAR3 WORD 20. +t ™
a Fe ye VARS _vpe~*l one werd Jas gy || ——_, & BYTE
Ly C symbol © BYTE C"
»
Chowacker shri “Asct™ “El fe cre ys™
la X spwhol © BYTE X's
Hexacleciuasl Shy ime
Ev We chip JS” fy Examplepages8 io) SIC Plogvewm
SOW gah RY 23 aye CYNE? + iad dy
SCN keys $ dov'e Wis aby A ot at, o-
ae Sok aa ~ asthe assembler Jy. ee
gt 2B rFe a8 bw SN otys
—_Lmemrevy!
Se Exownphe pose 13 Cp). 2 sas XE pega
414s eo EV Se LRN SiC /XE Sy GFE ghey t. Anew
" mele eHedive \wuredtube by PR ov) mh ack Wes Ie
se Ladi ge peu Ly Soo ih Coke site ge
ihe Se OM LO at nemory. fefeconians ens 1.3 The Simplified Instructional Computer (SIC)
These instructions operate by loading or storing the rightmost 8-bit byte of
register A; the other bits in register A are not affected.
Figure 1.2(a) also shows four different ways of defining storage for data
itgms in the SIC assembler language. (These assembler directives are discussed
in'more detail in Section 2.1.) The statement WORD reserves one word of stor-
age, which is initialized to a value defined in the operand field of the state-
ment. Thus the WORD statement in Fig. 1.2(a) defines a data word labeled
FIVE whose value is initialized to 5. The statement RESW reserves one or
more words of storage for use by the program. For example, the RESW state-
ment in Fig. 1.2(a) defines one word of storage labeled ALPHA, which will be
used to hold a value generated by the program.
The statements BYTE and RESB perform similar storage-definition func-
tions for data items that are characters instead of words. Thus in Fig. 1.2(a)
CHARZ is a 1-byte data item whose value is initialized to the character “Z”,
and C1 isa 1-byte variable with no initial value.
STORE IN CHARACTER VARIABLE Cl
ONE-WORD VARIABLE,
ONE-WORD CONSTANT
13
LOAD CONSTANT 5 INTO REGISTER A.A 4 vetepele napens Gt S\
STORE IN ALPHA ,
TOAD CHARACTER “2° NTO REGISTER A ALANA OTE Cy
go dee 2 5A HK ems 7 Cs Ye PH A &
oh VY Vio gs?
ONE-BYTE CONSTANT Cm ) immediate dy Gr ae
ONE-BYTE VARIABLE decal sug ste web yet
» deciveal /
Direchiver _
da sh ua C)
‘WDA 45 dee LOAD VALUE 5 INTO REGISTER A
STA ‘ALPHA STORE IN ALPHA
oA #ggdecra“"Z"" LOAD ASCIT CODE FOR *2’ INTO REG A
STORE IN CHARACTER VARIABLE Cl
STCH cl
; Lye 5A bes. + d= feeleeleal
(ONE-WORD VARIABLE
a RESB 1 ONE-BYTE VARIABLE
o
Figure 1.2 Sample data movement operations for (a) SIC and
(b) SICKE, gy eee
‘SYSTEMS PROGRAMMING
BIO ererynm
&- Ho/xKE
PALESTINE POLYTECHNIC UNIVERSITY
2023/2024 ENG, YOUSEF A. SALAH
PLS MEIN Yc sub gle trerhdaata
ce Ome SETA ALPHA TUR 5% Mery
J STA BETA 3
IDA. oxen = GAMMA x SUCRE.
‘i OELTA=GA
Ce A
oper Value sta DELTA 2
; ALPHA INR, _
2 sang DELTA,
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A am INCR
ALPHA RESW L ~ ~
BETA RESW oa Ls . i
eee ee es DONE 00 00 01
DELTA = RESW 1 a stast =
INCR RESW + sa
b (aes ashe yo ES BAO
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ts we a reg hte ee
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ALPHA RESW 1 s INCR
BETA. RESW 1
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Page 26 of 33 PALesTIN
SYSTEMS PROGRAMMING
1 POLYTECHNIC UNIVERSITY
2023/2024
ZERO
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