RAM ChIP
aderess tintt DOuo und
RD
WRt
CSt
Addyess-lincs: No. of locanons
Data linES N0. of bits in each locahon
moce
RDE Read ines (enable Jow
WR Wnte mode (enabie lom)
CS# Chip select (eable lod)
The RAM Sable to xe ad
Wnte hen CS O. Else
it is at tistate.
eg 1024 x8 chip.
1024 IO Cation X each ocaiom ontan
B bit.
his chip
oill reuive 10
addYess
and 8 data lines
ines
024x8 5 TeffeYYe.d as KB Df RAM
8
256
512
2 02
2 D8 2K
HO9b 4K
8192 8K
IS
16834 - 6 K
32368 3 2 K
G5,536 64K
4K8 Tam
12add lincs
8 data lines
RDE
CSA
8 Kb ram spoce using I KB RAMChips
8, KB Chips.
A0-A9
1B
KB
AlO
AI
KB
An
EN
KB
KB
1
KB
A10 A AS A AG AS
A12 A A A3
OO
ALALAO
OO O
OO L O 0 O 0 O O 0 O OOb
O0 0 O 0 0 0O O O O
225+16
Need oF SKB ram space using akb r e m
chips
AsA2 AIL AO Ag AX A3AS ASAM AS AL ALAO
OOO O
A0-AJO DO-D
A4
A13
A12
Al
EN PL
Hexadecimal Kargin9
o000OdIl U) 024
F F
Group by
nibbles (4 biis)
MemoryC
oYganisahon for 16 bit data bos.
21b space vsing Cb Chips.
16
D8-DIS
+0-
10
A0-A9 A0-A9
RDH R KB
HR
Cs
Odd Adde3
Even odcresS
memoy
hi? mernory)
low oY
Dependjnq on situation CS# raybe
Jous If 8 bits ave regyie
maybe
+0 be ead
maybO
Elee bo th CS,t & CS,#
b e Yead.
6 bit data hos to
at
addess 001B4 ,there 6 data cS.
then data s From DoD
F at addresS OO\B33, horc fs
det
2DH then daa is from D8- Dis.
a t address O0180H, there is
data AUFH (16 bit) hen data
wil be e rfrom both ra chips
Latch :
singe bt latch is a D-flip flop
CLK
Changcs in the d dato of flip O
hap perns hen clock is given.
8-bit latch (8 dfF)
CL
De-D
CLK
8 bit
bidivecriona) bu{fe
T
i t ip 8bit oT
Tis tansmit inPot OUtpot
1f T) then there is Ept
IF T 0 then there is ippet. pickup
Coutput- ipput)
Only hen enablc low
Fenablc is high op dnven in
tristate
ProcesSOY 8086
HE #/S+
8086
A16- A 19 S3-56
ADO ADIS
ALE
RD
M/1DH
DVR
DENE
BHEBit Hiqhev Enable
ALE Address LOtch Enatl e
M/10 Memory ox Input oupo t
D T/RDaia rasmi Hed/ Reccivcd
DEN Databus Enable Bov.
ADO ADIS -
Address /Data 1inrs
A6 A19 Address linc S
S3 S6 Status i'neS
While Neferring memory (M) Then
pYDLeSsoY OUtputS 20 bit dataa
Hhile refemng to DT then processor
outputS data
3-bt
1otchcs
3086
A 6-A 19/S3-S6 BHE&
ADO- AIS- 20
AD-AS
ALE J
WR
DO-DIS
DENH
ADO-ADE
2&bi bUSSevs
Processe prococes a clock signg!
Jhich dnves the 3 bit Lach
Cwhen it OUtPuts Adahess)
FoY even ad essr, ISB waysO
odd addvescs LSB aboJ12 1.
G DO- D)S
A- AIO B KB
RD
Ap BHE
Al-A19 AlA9
MTOH
M/TOt
BHE g0es 1ow eten uhen addres is
Odd &KB-0000DH 40 O0 FFH
BHE AO
from evcn add.
By te
te from odd add
By
O Word from both
even & Odd add
This Setup is Connecte d after the
&- 8bit buffeS
f Al to AJ9 is not consideved,
then addyesses beuond O0FFH
Can be
be accessed. But the addrrss
DIS
doesn'+ exist. Hene its beter e
DOt consickr Such addresses
eis
O0FEFH
eucn add.
n odd add.
m both
ade
