Digital Logic Design I

Gate-Level Minimization

Chapter # 03

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 3-2 The Map Method
The complexity of the digital logic gates is related to
• The complexity of the algebraic expression

Logic minimization
• Algebraic approaches: lack specific rules
• The Karnaugh map
• A simple straight forward procedure
• A pictorial form of a truth table
• Applicable if the # of variables < 7

The map method , first proposed by Veitch and modified by Karnaugh, is

also known as “Veitch diagram” or “Karnaugh map”

A diagram made up of squares

• Each square represents one minterm

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 Two-Variable Map

A two-variable map
• Four minterms
• x' = row 0; x = row 1
• y' = column 0; y =
column 1 Figure 3.1 Two-variable Map
• A truth table in square
diagram
• Fig. 3.2(a): xy = m3
• Fig. 3.2(b): x+y = x'y+xy'
+xy = m1+m2+m3

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Figure 3.2 Representation of functions in the map
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 A Three-variable Map
◼ Eight minterms
❑ The Gray code sequence
◼ Any two adjacent squares in the map differ by only on
variable
❑ Primed in one square and unprimed in the other
❑ e.g., m5 and m7 can be simplified using postulate
❑ m5+ m7 = xy'z + xyz = xz (y'+y) = xz

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Figure 3.3 Three-variable Map
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 A Three-variable Map..(Contd.)
◼ m5+ m7 = xy'z + xyz = xz (y'+y) = xz
◼ Here the two squares differ by the variable y, which can
be removed when the sum of the two minterms is
formed.
◼ Thus , Any two minterms in adjacent squares that are
ORed together will cause a removal of the different
variable.

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 A Three-variable Map
◼ Two squares may be adjacent even they do not touch each
other because the minterms differ by one variable
❑ m0 and m2 (m4 and m6) are adjacent
❑ m0+ m2 = x'y'z' + x'yz' = x'z' (y'+y) = x'z'
❑ m4+ m6 = xy'z' + xyz' = xz' (y'+y) = xz'

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 Example 3.1
◼ Simplify the Boolean function F(x, y, z) = (2, 3, 4, 5)
❑ 1st Step: Mark 1 in each square as per function
❑ 2nd step: Find possible adjacent squares
❑ F(x, y, z) = (2, 3, 4, 5) = x'y + xy'

Figure 3.4 Map for Example 3.1, F(x, y, z) = Σ(2, 3, 4, 5) = x'y + xy'

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 Example 3.2
◼ Example 3.2: simplify F(x, y, z) = (3, 4, 6, 7)
❑ F(x, y, z) = (3, 4, 6, 7) = yz+ xz'

Figure 3.5 Map for Example 3-2; F(x, y, z) = Σ(3, 4, 6, 7) = yz + xz'

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 Four adjacent Squares
◼ Consider four adjacent squares
◼ 0,2, 4, and 6 squares
◼ m0+m2+m4+m6 =x'y'z'+x'yz'+xy'z'+xyz' = x'z'(y'+y) +xz'(y'+y) = x'z' + xz‘ = z'
◼ m1+m3+m5+m7 = x'y'z+x'yz+xy'z+xyz =x'z(y'+y) + xz(y'+y) =x'z + xz = z
◼ Total number of adjacent square must be power of two
(1,2,4,8)

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Figure 3.3 Three-variable Map
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 Four adjacent Squares..(Contd.)
◼ As a larger number of adjacent squares are combined, we
obtain a product term with fewer literals.
◼ 1 square represents one minterm, giving a term of 3 literals.
◼ 2 squares represents a term of 2 literals.
◼ 4 squares represents a term of 1 literals.
◼ 8 square encompass the entire map and produce a function
that is always equal to 1

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 Example 3.3
 Example 3.3: simplify F(x, y, z) = (0, 2, 4, 5, 6)
 F(x, y, z) = (0, 2, 4, 5, 6) = z'+ xy‘
 First, we combine the four adjacent squares in the first and
last columns to give the single literal z’
 Remaining single square representing minterm 5 is
combined with an adjacent square that has already been
used once.

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 Example 3.3 Further Explanation
❖ Group 1:The four adjacent squares in the first and last
columns (minterms 0,2,4,6) can be grouped together.
❖ This grouping simplifies to a single literal, 𝑧′, because the value of 𝑧
is always 0 (or 𝑧′) in these minterms, while 𝑥 and 𝑦 vary.
❖ Group Σ(0,2,4,6) simplifies to 𝑧′.
❖ Group 2:Now, the remaining single square is minterms 5
(where 𝑥=1,𝑦=0,𝑧=1). This square can be combined with an
already used adjacent square, minterms 4 (where
𝑥=1,𝑦=0,𝑧=0),
❖ as Karnaugh maps allow "overlapping" groups to simplify the
expression further. This grouping of Σ(4,5) simplifies to 𝑥⋅𝑦′, because
𝑥 remains constant (1), and 𝑦=0(or 𝑦′) for both minterms.
❖ Group Σ(4,5) simplifies to 𝑥⋅𝑦′.

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 Example 3.4
Let F = A'C + A'B + AB'C + BC
a) Express it in sum of minterms.
b) Find the minimal sum of products expression.
Ans:
F(A, B, C) = S(1, 2, 3, 5, 7) = C + A'B

Figure 3.7 Map for Example 3.4, A'C + A'B + AB'C + BC = C + A'B
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 3.3 Four-Variable Map
◼ The map
❑ 16 minterms
❑ Combinations of 2, 4, 8, and 16 adjacent squares

October 24, 2024 Figure 3.8 Four-variable Map 14

 3.3 Four-Variable Map…(Contd..)
◼ One square represents one minterms, giving a term of four
literals
◼ Two adjacent squares represent a term of three literals
◼ Four adjacent squares represent a term of two literals
◼ Eight adjacent squares represent a term of one literal
◼ 16 adjacent squares represent the function equal to 1
◼ No other combination of squares can simplify

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 Example 3.5
◼ Simplify F(w, x, y, z) = S(0, 1, 2, 4, 5, 6, 8, 9, 12, 13, 14)
F = y'+w'z'+xz'
◼ Eight adjacent squares Marked
with 1’s can be Combined to form one
literal term y’
◼ Remaining three 1’s can’t Combined
to give a simplified Term
◼ They must be combining as two or
four adjacent squares.
◼ Top two 1’s on the right are combined with the top two 1’s on the
left to give the term w’z’
F(w, x, y, z) = Σ(0, 1, 2, 4, 5, 6, 8, 9, 12, 13, 14) = y' + w' z' +xz'

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 Example 3.5…(Contd…)
➢ It is permissible to use the same square more than once
➢ Now one square is left [square 1110]
➢ We combine it with square already used to form an area of four
adjacent squares, comprises two middle rows and the two end
col, giving term xz’

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 Example 3.6
Simplify F = A B C + B CD + A B C D + AB C

Figure 3.9 Map for Example 3-6; ABC + BCD + ABCD + ABC= BD + BC +ACD

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 3-5 Product of Sums Simplification
➢ In previous example of simplification using k map , simplified
expressions were represented in the sum of product form
➢ Approach #1:Simplified F' in the form of sum of products
➢ Apply De Morgan's theorem F = (F')'
➢ F': sum of products → F: product of sums
➢ Approach #2: duality: Combinations of maxterms (it was minterms)
➢ M0M1 = (A+B+C+D)(A+B+C+D') = (A+B+C)+(DD') = A+B+C

CD
AB 00 01 11 10
00 M0 M1 M3 M2
01 M4 M5 M7 M6
11 M12 M13 M15 M14
10 M8 M9 M11 M10
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 Example 3.8
 Example 3.8: simplify F = S(0, 1, 2, 5, 8, 9, 10) into (a) sum-of-
products form, and (b) product-of-sums form:

a) F(A, B, C, D)= (0, 1, 2, 5, 8,

9, 10) = B'D'+B'C'+A'C'D
b) If the squares marked with 0’s
are combined,we obtain
simplified complemented
function
F' = AB+CD+BD'
» Apply DeMorgan's theorem;
F=(A'+B')(C'+D')(B'+D)
» Or think in terms of maxterms

Figure 3.14 Map for Example 3.8, F(A, B, C, D)= (0, 1, 2, 5, 8, 9, 10) = B'D'+B'C'+A'C'D

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 Example 3.8 (cont.)
◼ Gate implementation of the function of Example 3.8

Sum-of products form Product-of sums form

Figure 3.15 Gate Implementation of the Function of Example 3.8

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 Sum-of-Min Term Procedure
◼ Consider the function defined in Table 3.2.
❑ In sum-of-minterm:

F ( x, y, z ) =  (1,3,4,6)
❑ In sum-of-maxterm:

F ( x, y , z ) = (0, 2,5,7)
❑ Taking the complement of F

F ( x, y , z ) = ( x + z )( x + z )

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 Sum-of-Minterm Procedure
◼ Consider the function defined in Table 3.2.
❑ Combine the 1’s:

F ( x, y , z ) = xz + xz 
❑ Combine the 0’s :

F'( x, y , z ) = xz + xz 

Figure 3.16 Map for the function of Table 3.2

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 3-6 Don't-Care Conditions
➢ The value of a function is not specified for certain combinations
of variables
➢ BCD; 1010-1111: don't care
➢ An X inside a square in the map indicates that we don’t care
whether the value of 0 or 1 is assigned to F
➢ The don't-care conditions can be utilized in logic minimization
➢ When choosing adjacent squares to simplify the function in a map,
the don’t-care minterms may be assumed to be either 0 or
1,depending on which combination gives the simplest expression

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 Example
Example :simplify F(w, x, y, z) = (1, 3, 7, 11, 15) which
has the don't-care conditions d(w, x, y, z) = (0, 2, 5).
❑ F = yz + w'x'; F = yz + w'z
❑ F = (0, 1, 2, 3, 7, 11, 15) ; F = (1, 3, 5, 7, 11, 15)
❑ Either expression is acceptable

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3-7 NAND and NOR Implementation
◼ NAND and NOR are universal gates
❑ Can be used to implement any digital system

Figure 3.18 Logic Operations with NAND Gates

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 NAND Gate
◼ Two graphic symbols for a NAND gate
◼ Invert-OR symbol follows the DegMorgan’s theorum

Figure 3.19 Two Graphic Symbols for NAND Gate

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 Two-level Implementation
◼ Three ways to
implement F=AB+CD+E
◼ Implementation of
Boolean function with
NAND gates requires
the simplified function in
sum of product form
(part(a))
◼ In b AND replaced by
NAND and OR by
NAND (invert-OR
symbol)
◼ Part c can be verified
using demorgan’s
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theorum 28
 Example 3.10
◼ Example 3-10: implement F(x, y, z) =

F ( x, y, z ) =  (1,2,3,4,5,7) F ( x, y , z ) = xy  + xy + z

October 24, 2024 Figure 3.21 Solution to Example 3-10 29

 Procedure with Two Levels NAND
◼ Rules for obtaining NAND logic diagram from a boolean
function is as follows:

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 NOR Implementation
◼ NOR function is the dual of NAND function.
◼ Function must be in POS form
◼ The NOR gate is also universal.

October 24, 2024 Figure 3.24 Logic Operation with NOR Gates
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Two Graphic Symbols for a NOR Gate

Figure 3.25 Two Graphic Symbols for NOR Gate

Example: F = (A + B)(C + D)E

October 24, 2024 Figure 3.26 Implementing F = (A + B)(C + D)E 33

 Example

Example: F = (AB +AB)(C + D)

Figure 3.27 Implementing F = (AB +AB)(C + D) with NOR gates

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