Chapter II.
Literature Review 9
The most ubiquitous topology in integrated analog design is the two-stage CMOS op-
amp, which consists of a differential input stage followed by a second gain stage (often
a common-source amplifier). This architecture is widely adopted as a compromise
between gain, bandwidth, and complexity . A basic two-stage op-amp can provide
moderate gain (typically on the order of 103 –104 , or 60–80 dB) and moderate output
swing, making it suitable for many applications. However, even a two-stage amplifier
is a second-order system and can face stability issues due to its two poles . Designing
a stable two-stage op-amp requires careful frequency compensation (discussed in
Section 2.2) to ensure one pole dominates (so the closed-loop behaves like a first-
order system). Without compensation, the phase shift from two or more poles could
lead to oscillations or an under-damped step response.
For applications demanding higher gain, additional stages can be added. Three-
stage op-amps (and beyond) have been explored to push DC gain into the high-
80s or 100+ dB range . These architectures are particularly useful when cascode
transistors cannot be used (due to low supply) or when even a cascoded two-stage
does not meet gain requirements. A three-stage op-amp typically comprises the
differential input stage, an intermediate gain stage, and an output stage (which
may also serve as a buffer for driving loads). By cascading three gain elements,
extremely high open-loop gain can be achieved. For instance, a nested three-stage
design in 180 nm CMOS demonstrated about 115 dB DC gain . In practice, multi-
stage amplifiers with 3 or 4 stages are often needed in precision analog front-ends
and pipelined ADCs to meet gain and linearity targets . The trade-off, however,
is that each additional stage introduces an extra pole in the frequency response,
complicating the stability. Thus, as the number of stages increases, the design must
devote more effort to frequency compensation techniques to maintain a sufficient
phase margin for stability . In summary, multi-stage op-amp architectures offer a
Chapter II. Literature Review 10
path to high gain and the ability to operate at lower supply voltages, at the expense
of requiring advanced compensation schemes to manage the resulting higher-order
dynamics.
2.2 Frequency Compensation Techniques
Given the tendency of multi-stage amplifiers to become unstable (due to multiple
poles), frequency compensation is crucial. The goal of compensation is to shape
the open-loop frequency response such that the amplifier behaves like a first-order
(single pole) system up to the unity-gain frequency, thereby avoiding excessive phase
lag that could cause oscillations . This section reviews several compensation tech-
niques: Miller compensation (including its variants like nulling resistor), nested
Miller schemes for multi-stage designs, current-buffer (indirect) compensation, and
the more recent cascade-zero compensation approach.
Miller Compensation (Direct Compensation): The classical compensation method
for a two-stage op-amp is Miller compensation, which involves connecting a capac-
itor Cc between the output of the first stage and the output of the second stage
(essentially feeding back a frequency-dependent signal from the second stage output
to the first) . The Miller capacitor serves to create a dominant pole at the first stage
output by effectively enlarging the capacitance seen at that node (Miller effect),
thereby pushing the first pole to a low frequency. The second pole (at the output
stage) is correspondingly pushed to a higher frequency, ideally beyond the unity-
gain crossover, so that the open-loop transfer function appears single-pole within
the bandwidth of interest . In effect, Miller compensation forces a two-stage op-amp
to behave as a first-order system for stability. However, a known drawback is that
Chapter II. Literature Review 11
the Miller feedback capacitor introduces a right-half-plane (RHP) zero in the trans-
fer function . This happens because a portion of the first-stage output current can
feed forward through Cc directly into the second stage output, bypassing the second
stage transistor, and creating a zero that adds positive phase (lead) but being in
the RHP actually reduces phase margin. The RHP zero can significantly deteriorate
stability by reducing phase margin and requiring a larger compensation capacitance
(thus narrower bandwidth) to counteract its effect . In short, Miller compensation
ensures stability by pole separation but at the cost of an undesirable RHP zero and
potential bandwidth reduction.
Nulling-Resistor Compensation: To mitigate the RHP zero issue of Miller compensa-
tion, the nulling resistor technique is often employed. This involves placing a resistor
RN in series with the Miller capacitor. By proper choice of RN , the feed-forward
zero can be moved out to very high frequency or even canceled. In fact, setting
RN = 1/gm1 of the first stage can theoretically move the RHP zero to infinity ,
effectively nullifying it. In practice, a slightly larger RN will move the zero into
the left-half-plane (LHP), which can actually improve phase margin by providing a
lead compensating effect. The trade-off is that the introduction of RN modifies the
pole-zero positions in a way that can narrow the bandwidth if not optimized . The
nulling resistor adds another pole-zero pair to the system (one zero is intended to
cancel the Miller zero, but a new pole is created at a very high frequency due to RN
and Cc ). Designers must balance RN and Cc to ensure the zero cancellation with-
out significantly lowering the unity-gain frequency. Despite the slight bandwidth
penalty, nulling resistor compensation is popular for two-stage op-amps because it
yields a stable, well-damped response without the RHP zero. For instance, a two-
stage 90 nm op-amp using Miller compensation with a nulling resistor achieved a
unity-gain bandwidth of 32.7 MHz and stable operation (phase margin 65°) . This
