DEPARTMENT OF TECHNICAL EDUCATION
ANDHRA PRADESH
Name : CH. Rajendra Prasad
Designation : Senior Lecturer in ECE
Branch : ECE
Institute : QQ. Govt. Polytechnic, Hyderabad
Year/Semester : IV Semester
Subject : Microprocessors
Subject Code : CM 405
Topic : Introduction and Architecture
Duration : 100Mts
Sub Topic : Address calculation
Revised by :K.Srikanth,Lecturer,GPT, Nizamabad
9CM405.5TO6 1
Objectives
On completion of this period the student would be able to
• Understand instruction flow in 8086
• Understand data flow in 8086
• Address calculation
9CM405.5TO6 2
Recap
In the previous class, you have studied about
• The architecture of 8086 processor
• Functions of various units of 8086 processor
9CM405.5TO6 3
Instruction
• It is used to perform a specific task on the specified data
• A programme contains a logical sequence of instructions
• The time taken to process an instruction by the
processor is called instruction cycle
9CM405.5TO6 4
Programme execution
• Any program to be executed must be stored in the code
segment of memory
• Its starting address must be loaded into CS:IP to begin
its execution
9CM405.5TO6 5
Physical address
• 16-bit segment register contents are loaded into a 20-bit
ALU in BIU and shifted to left by 4-bits, inserting zeros in
four LSBs
• Thus, CS contents are changed from 16 to 20 bits in BIU
• The 16-bit offset in IP is added to the shifted CS to
generate 20-bit physical address
• Therefore,
Physical address = CSx16+IP (or) CSx10H+IP
9CM405.5TO6 6
Example
Let CS=5000H and IP=1234H
20bit physical address = 5000Hx10H + 1234H
= 50000H+1234H
= 51234H
9CM405.5TO6 7
Example (contd.)
• The physical address 51234H computed in BIU is sent to
the memory to access the instruction
• The RD is made active and instruction code is fetched from
the memory and placed in the Instruction queue
• Instruction queue support FIFO operation
9CM405.5TO6 8
Example (contd.)
• The EU fetches instruction code from the queue
• The instruction is decoded to understand the task and
also the addressing mode of the instruction
• If the required operands are in the 8086, the instruction
is executed and the IP is incremented to point to the next
instruction
9CM405.5TO6 9
Other possibility
• If the required operand (data) is in the data segment of
memory, the operand fetch must be performed
• EU sends the offset for operand (data) to BIU which
combines it with DS contents to generate the 20bit
physical address to identify the data
• The data is brought from the memory into EU and
instruction is executed, IP is incremented to identify the
next instruction
9CM405.5TO6 10
Summary
In this class, you have understood about
• Instruction and data flow in 8086
• Calculation of 20-bit Physical address
9CM405.5TO6 11
Quiz
1.The instruction code is brought to the microprocessor
from the following segment of memory
a). CS
b). ES
c). SS
d). DS
9CM405.5TO6 12
Frequently Asked Question
1. Explain how 8086 executes an instruction stored in
memory
2. Explain the method of calculation of physical address
9CM405.5TO6 13
