clockDesign
clockDesign
[-help]
[-check]
[-clk clkName ]
fileName ]
[-incrPostCTSsdcFile
dirName ]
[-outDir
[-macromodel fileName ]
[-noDeleteClockTree]
[-postCTSsdcFile fileName ]
[-skipPostCTS]
[-skipTimeDesign]
[-specFile file1 file2 ...]
[-specViewList {{ spec1 view1 view2 ...} { spec2 view1 view2 ...}...}]
[-updateIoLatency]
Automates the CTS portion of the EDI System timing closure flow. The
clockDesign command streamlines the settings of recommended command
modes and parameters. It automatically runs clock tree synthesis based on
the current settings of the setCTSMode command and SDC constraints, and
generates the standard clock skew and timing reports. It also automatically
sets the setCTSMode -routeClockNet parameter to true .
If the software detects that no clock specification has been loaded into the
memory, it automatically calls the createClockTreeSpec command to generate a
specification and run CTS using that specification. However, if a clock is
specified in the memory, the software runs CTS using the specification
present in the memory.
The clockDesign command supports useful skew ( setOptMode -usefulSkew true ). It
checks if this mode is true to determine if the clock scheduling file is to be
considered for CTS. It automatically deletes existing clock trees unless you
specify that it should not do so by using the - noDeleteClockTree parameter.
The clockDesign command runs ckECO -postCTS by default.
If the software is in multi-mode multi-corner (MMMC) analysis mode, clockDesign
creates one specification file that considers all the constraint modes. You can
use the clockDesign command after specifying the clock tree specification file.
You can specify the buffer list in a configuration file or through the EDI
System GUI (the CTS Cell List option on the Design - Design Import -
Advanced - IPO/CTS tab).
The clockDesign command requires both setup and hold analysis views to be
set in the EDI session. If no analysis view is set, the command will error out.
If you want to view the CTS commands (and parameters) used by the
clockDesign command during the EDI session, see the log file for that session.
You can control the behavior of clockDesign and its relationship to the setCTSMode
command in the following ways:
If you run clockDesign without any parameters, the clockDesign command
synthesizes the clock trees using the current settings of the setCTSMode
command and the SDC constraints. The clockDesign command
automatically sets the setCTSMode -routeClockNet parameter to true .
By changing the default settings of the setCTSMode command, the
corresponding parameters in the generated clock tree specification file
are altered.
The setCTSMode command has certain default settings. You can change the
default settings as per your requirements. These settings, however, are
global and CTS applies the settings to all the clocks in the design.
The various settings in the clock tree specification file are commented
out by default. You can uncomment and change the settings for specific
clocks, if required. You can then reload the updated clock tree
specification file using the - specFile parameter of the clockDesign command
and run CTS. (The settings are commented out to give you the flexibility
to control various parameters for the remaining clocks that have the
global settings defined by setCTSMode .)
The settings in the clock tree specification file take priority over settings
defined by setCTSMode . The setCTSMode command cannot override parameters
that are defined in the clock tree specification file.
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Parameters
-help Outputs a brief description that includes type and default
information for each clockDesign parameter.
For a detailed description of the command and all of its
parameters, use the man command: man clockDesign .
-check Traces the clock net and reports the clock structure. The
report file is top_cell_name .cts.trace .
Note: This check is recommended before you run gated
CTS.
Note: This parameter is not supported when setCTSMode –
engine is ccopt .
-clk clkName Builds clock tree only for the specified clock.
Note: This parameter is not supported when setCTSMode –
engine is ccopt . Remove the clock by updating the
specification file with the specifyClockTree -update command.
-incrPostCTSsdcFile Loads the specified incremental SDC file.
fileName
Use this parameter to load an incremental SDC file after CTS
in order to make minor changes, such as changing the
clock_uncertainty value, or to add the set_clock_latency statement.
Note: This parameter is not supported when setCTSMode –
engine is ccopt . Use the update_analysis_view command after
running clockDesign .
-macroModel Specifies the name of the macro model report. You can
fileName report after running CTS or after restoring the design and
specifying the clock tree specification file.
Note: This parameter is not supported when setCTSMode –
engine is ccopt . Use the reportClockTree –macromodel command
instead.
-
noDeleteClockTree
Specifies that CTS should not remove existing clock trees
before running the ckSynthesis command.
Default : If you do not specify this parameter, CTS removes
existing clock trees before ckSynthesis .
Note: This parameter is not supported when setCTSMode –
engine is ccopt.
-outDir dirName Creates a directory for the timing and skew reports after the
completion of CTS.
Note: This parameter is not fully supported when setCTSMode
–engine is ccopt because it does not support any options that
export a file during clockDesign . Use the report commands
for the required output after running clockDesign .
-postCTSsdcFile
Loads the specified post-CTS SDC file after CTS, before
fileName
running timeDesign .
If you specify this parameter, CTS clears the original SDC
file from the memory and loads the new SDC file before
running timeDesign -postCTS .
Note: You can load an incremental SDC file ( - incrPostCTSsdcFile )
and a post-CTS SDC file together. If you do, CTS clears the
original SDC file from the memory, loads the new post-CTS
file, and then loads the incremental file.
Note: This parameter is not supported when setCTSMode –
engine is ccopt . Use the update_analysis_view command after
running clockDesign .
-specFile file1 Specifies the user-defined clock tree specification file to use
file2 ... to drive CTS. You can specify one or more specification files.
-specViewList {{
Loads the specified clock tree specification files, and uses
spec1 view1
view2 ...} {
them to run CTS on the specified analysis views.
spec2 view1 For example, if you specify:
view2 ...}...}
clockDesign -specViewList {{func_mode.spec / func_max_view1 func_max_view2}
{test_mode.spec / func_min_view1 test_min_view1}}
The software performs the following actions:
Runs CTS using the func_mode.spec spec file for the delay
corner objects in the func_max_view1 and f unc_max_view2
analysis views.
Marks the nets as dontTouch .
Runs CTS using the test_mode.spec spec file for the delay
corner objects in the func_min_view1 and test_min_view2 analysis
views.
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Note: The -specViewList parameter can be used only with the -outDir
parameter.
Note: This parameter is not supported when setCTSMode –
engine is ccopt . The software issues a warning that this
option is not required because it natively handles
concurrent multi-mode CTS.
-skipPostCTS
Turns off ckECO -postCTS during clockDesign for better performance.
Note: This parameter is not supported when setCTSMode –
engine is ccopt because it does not have separate ckSynthesis
and ckECO steps.
- skipTimeDesign Eliminates the run of timeDesign -postCTS in clockDesign .
Note: This parameter is disabled by default.
Note: This parameter is not supported when setCTSMode –
engine is ccopt because it does not run any post-CTS timing
reports. Use timeDesign –postCTS after running clockDesign .
-updateIoLatency
Provides an automated means of invoking IO latency
balancing after CTS. Specifying this parameter is the same
as running update_io_latency command after CTS.
This parameter performs the following actions:
Automatically determines the proper pairing of IO and
core clocks
Measures and calculates the average overall core clock
latencies
Updates IO clock network latency to minimize preCTS vs.
postCTS skew
Makes clock root pins/ports propagated, and removes
ideal latencies in the clock tree
Provides per analysis_view adjustments in the MMMC
mode
Note: This parameter is mainly used to balance IO and core
latencies between pre and post CTS stage.
Note: This parameter is not supported when setCTSMode –
engine is ccopt. Use the set_ccopt_mode -modify_clock_latency
parameter to modify the latencies.
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