UNIT I- ICs and OP- AMPS

Integrated Circuits and Operational Amplifier: Introduction, Classification of IC‘s, IC chip size and
circuit complexity, basic information of Op-Amp IC741 and its features, the ideal Operational
amplifier, Op-Amp internal circuit, Op-Amp characteristics - DC and AC, Features of 741 Op-Amp.

Definition of IC:
An integrated circuit (IC), also known as a chip, is a miniaturized electronic circuit that contains many
components like transistors, resistors, and capacitors, all fabricated on a single semiconductor
(usually silicon) wafer. It's the foundation of modern electronics, enabling complex functionalities in
compact devices.

Purpose: ICs are designed to perform specific electronic functions such as amplification, signal
processing, computation, etc.

Advantages:

o Compact size
o Low cost (mass production)
o High reliability
o Low power consumption
o Improved performance and speed
Drawbacks of Integrated Circuits:

o Limited Power Handling Capacity

o Inability to Replace Individual Components
o Limited to Certain Passive Components:
o Thermal Management Issues
Applications of ICs:

1. Consumer Electronics
2. Industrial Electronics
3. Computers and Peripherals
4. Communication Systems
5. Automotive Electronics
6. Medical Devices
7. Signal Processing
8. Power Management
9. Measurement and Instrumentation

IC Classification
Classification Basis Type
1. By Fabrication - Monolithic IC
- Hybrid IC
- Thin and Thick Film IC
2. By Functionality - Analog IC
- Digital IC
- Mixed-Signal IC
3. By Application - Linear IC (e.g., Op-Amps)
- Power IC
 - RF IC
- Audio IC
4. By Packaging - Dual In-line Package (DIP)
- Surface Mount Device (SMD)
- BGA
5. By Technology - Bipolar IC
- MOS IC (CMOS, NMOS, PMOS)
- BiCMOS IC
6. By Logic Family (Digital) - TTL (Transistor-Transistor Logic)
- CMOS (Complementary MOS)
- ECL (Emitter Coupled Logic)
7. By Complexity - SSI (Small Scale Integration)
- MSI (Medium Scale Integration)
- LSI (Large Scale Integration)
- VLSI (Very Large Scale Integration)
- ULSI (Ultra-Large Scale Integration)

IC Chip Size:
Definition:

Physical dimensions of the silicon die that holds the IC components.

Factors affecting IC chip size:

 Number of transistors/components
 Technology node (e.g., 7nm, 14nm)
 Power and heat dissipation requirements
 Functionality and interconnect layout

Smaller size

✅ Lower cost
✅ Better performance
✅ Lower power consumption
Circuit Complexity Levels

Integration Level Transistor Count Example

SSI – Small Scale < 100 Logic gates (AND, OR, NOT)
MSI – Medium Scale 100 – 1,000 Adders, Encoders, Decoders
LSI – Large Scale 1,000 – 10,000 ROM, RAM, Microprocessor (early)
VLSI – Very Large Scale 10,000 – 1,000,000+ CPUs, FPGAs, SoCs
ULSI – Ultra Large > 1,000,000 Modern processors (Intel i9, M2)

Relationship Between Chip Size and Complexity

 ⬆ Complexity → ⬆ Transistors → ⬆ Chip area

 To reduce chip size despite complexity:

o Shrink transistor sizes (Moore’s Law)

 o Use advanced lithography (EUV)

o Optimize layout (EDA tools)

Moore’s Law

“The number of transistors on an IC doubles approximately every 2 years.”

 Enabled exponential growth in performance

 But also increased design and manufacturing complexity

Real-World Examples:

Chip Technology Transistors Application

Intel 4004 (1971) 10 µm 2,300 First microprocessor
Intel Core i9 10nm ~10 High-end computing
(2023) billion+
Apple M2 (2023) 5nm ~20 billion Mobile / AI / SoC chip

Summary:

 IC chip size determines physical limits and cost

 Circuit complexity defines the functionality
 Modern ICs balance size, complexity, and power using VLSI/ULSI and EDA tools
 Trend: Smaller, more powerful, and more efficient chips

Basic Information of operational Amplifier (IC741):

Definition:
An operational amplifier is a direct coupled high gain amplifier usually consisting of
one or more differential amplifier and usually followed by a level translator and an output
stage.

An operational amplifier is available as a single integrated circuit package. The

operational amplifier is a versatile device that can be used to amplify DC as well as AC input
signals and was originally designed for computing such mathematical functions as addition,
subtraction, multiplication and integration. With the addition of suitable external feedback
components, the modern-day op-amp can be used for a variety of applications such as AC
and DC signal amplification, active filters, oscillator, comparators and regulators, and others

Pin Diagram & Symbol

IC 741 Op-amp Features:
 It has only one op-amp inside
 Provide Short circuit protection
 Provide overload protection
 It has two input terminals
 It has two power supplies
 Large common-mode rejection ratio (CMRR) and differential voltage ranges.
 Low power consumption
 Large input voltage range
 High gain
Ideal & Practical characteristics of op-amp:
The ideal characteristics of an Operational Amplifier (Op-Amp) are theoretical
assumptions made to simplify analysis and design. In practice, real op-amps closely
approximate these characteristics but not perfectly.

1. Infinite Open-Loop Gain (A)

 Meaning: The gain without any external feedback is infinite.
 Explanation: Even a tiny voltage difference between the input terminals results in a
large output voltage.
 Implication: In practice, this means that in a closed-loop configuration, the voltage
difference between the inputs is virtually zero
2. Infinite Input Impedance
 Meaning: No current flows into the input terminals.
 Explanation: The op-amp does not load the input signal source.
 Implication: Input currents I+ and I- are ideally zero.

3. Zero Output Impedance

 Meaning: The output can drive any load without voltage drop.
 Explanation: The output voltage is not affected by the connected load.
 Implication: Perfect voltage source behaviour.
4. Infinite Bandwidth
 Meaning: The gain remains constant over all frequencies.
 Explanation: It can amplify signals of any frequency, from DC to the highest.
 Implication: No frequency distortion; perfect for AC and DC applications.
5. Infinite Common-Mode Rejection Ratio (CMRR)
 Meaning: It rejects any voltage common to both inputs.
 Explanation: Only the difference between the inputs is amplified.
 Implication: Common noise signals are completely eliminated.
6. Infinite Power Supply Rejection Ratio (PSRR)
Meaning: Output is not affected by variations in power supply voltage.
Explanation: The op-amp maintains performance even if power supply fluctuates.
Implication: Excellent stability in noisy environments.
7. Zero Offset Voltage
 Meaning: Output is exactly zero when the input difference is zero.
 Explanation: No internal mismatch or biasing error.
 Implication: No need for external correction or calibration.
8. Infinite Slew Rate
 Meaning: The output changes instantly with input changes.
 Explanation: No delay or lag in response to rapid signal transitions.
 Implication: Can perfectly track fast-changing signals.
Op-amp Internal Circuit:
The internal structure of an operational amplifier (op-amp) is comprised of several stages
working together to achieve its high gain, high input impedance, and low output impedance
characteristics.
1. Input stage: differential amplifier
 This is the first stage, crucial for the op-amp's differential amplification capability.
  It amplifies the difference between the two input voltages (inverting and non-
inverting terminals) while rejecting common-mode signals (noise appearing on both
inputs).
 This stage also provides the high input impedance that is a hallmark of op-amps.
 It typically utilizes a dual input, balanced output differential amplifier configuration.
 The high input impedance is often achieved using special techniques with transistors
like BJTs or FETs in this stage.

2. Intermediate stage: gain stage

 This stage is a high-gain voltage amplifier, usually composed of several transistors,
and is responsible for providing most of the op-amp's overall voltage gain.
 The output of the input stage drives the intermediate stage, which further amplifies the
signal.
 This stage can be configured as a dual input, unbalanced output differential amplifier,
further increasing the voltage gain.
3.Level-shifting stage
 Due to direct coupling between the stages, the DC voltage level at the output of the
intermediate stage can be above ground potential.
  The level-shifting stage, often using an emitter follower with a constant current
source, shifts this DC level down to zero volts with respect to ground, ensuring a
proper operating point for the subsequent output stage
4. Output stage
 This is the final stage and provides the op-amp with its ability to drive a load and its
low output impedance.
 It's typically a complementary push-pull amplifier (Class AB amplifier), increasing
the output voltage swing and current delivery capability.
 It aims to provide a large output voltage range, ideally close to the power supply rails
(rail-to-rail output), but this is often achieved under light load conditions.
 This stage often incorporates current limiting and short-circuits protection features to
safeguard the device.

Block diagram of Operational Amplifier

(Note: Block diagram Explanation is same as that of op-amp internal circuit.)

AC Characteristics of Op-amp:
The AC characteristics of an op-amp, including its Frequency response, circuit stability,
frequency compensation, slew rate, and CMRR are crucial for understanding its performance
in various applications. These characteristics determine how well the op-amp can amplify
signals of different frequencies and shapes, and whether it will introduce distortion or
instability.
1. Frequency response
2. Circuit stability
3. Frequency compensation
i. External frequency compensation
ii.Internal frequency compensation
4. Slew rate
5. Common-Mode Rejection Ratio (CMRR)
6. Power Supply Rejection Ratio (PSRR)
1. Frequency response:
Definition: The manner in which the gain of the op-amp responds to different
frequencies is called the frequency response.
The variation in operating frequency will cause variations in gain magnitude and its phase
angle. Op-amp should have an infinite bandwidth BW =∞ (i.e.) if its open loop gain in 90dB
with dc signal its gain should remain the same 90 dB through audio and onto high radio
frequency. The op-amp gain decreases (roll-off) at higher frequency what reasons to decrease
gain after a certain frequency reached. There must be a capacitive component in the
equivalent circuit of the op-amp. For an op-amp with only one break (corner) frequency all
the capacitors effects can be represented by a single capacitor C. Below fig is a modified
variation of the low frequency model with capacitor C at the output.
f1 is the corner frequency or the upper 3 dB frequency of the op-amp. The magnitude and
phase angle of the open loop volt gain are f1 of frequency can be written as, The magnitude
and phase angle characteristics:
1. For frequency f<< f1 the magnitude of the gain is 20 log AOL in db.
2. At frequency f = f1 the gain in 3 dB down from the dc value of AOL in db. This
frequency f1 is called corner frequency.
3. For f>> f1 the fain roll-off at the rate off -20dB/decade or -6dB/decade.
 Open loop gain vs Frequency
2. Circuit Stability:
Definition:
A circuit or a group of circuits connected together as a system is said to be stable if its
output reaches a fixed value in a finite time. On the other hand, a system is said to be unstable
if its output increases with time instead of achieving a fixed value.
In fact, the output of an unstable system keeps on increasing until the system breaks
down. Therefore, unstable systems are impractical and need to be made stable. The criterion
given for stability is used when the system is to be tested practically. However, theoretically,
analytical and/or graphical methods ...
The critical values of loop gain are 0 dB and -180°
Gain Margin (G.M):
G.M = -20 log |AOL(f) × β| (dB)
Phase Margin (P.M):
P.M = 180° + ∠AOL(f) × β
If G.M is positive (i.e., AOL(f) × β is –ve), then the system is stable.
The negative values of G.M and P.M indicate instability of the system.
3.Frequency Compensation:
The op-amp circuit with single break or corner frequency is inherently stable.
Frequency compensation technique is used
– To get larger bandwidth with lower closed loop gain
– To alter the response as per the requirement.
There are 2 compensation techniques:
1. External compensation
2. Internal compensation
External compensation
i)Dominant pole compensation:

In this loop gain, the dominant pole is introduced by adding a compensating network. Such a
network is nothing but a simple R-C network
The dominant pole means the pole with magnitude much smaller than the existing poles. And
hence the break frequency of the compensating network is the smallest compared to the
existing break frequencies.
The transfer function of the compensating network can be obtained as:
A1 = Transfer function of compensating network
= Vo / V’o
By the voltage divider rule applied to the network

The values of R and C are selected in such a way that the loop gain drops to 0 dB with a slope
of -20 dB/decade and at a frequency where the poles of uncompensated system contribute
very small phase shift. This ensures that at ω = ωgc, the phase shift ϕ(f) is greater than -180°
and hence positive phase margin. Generally, fd is selected so that magnitude plot for A'
passes through 0 dB at the pole f1 of A i.e. ωgc = fi- The uncompensated and compensated
magnitude plots are shown in the Fig.
It can be observed from the plot that 3 dB down bandwidth for non-compensated system is
BW1 while for compensated it becomes BW2. There is drastic reduction in the bandwidth.
Advantages:
i) As the noise frequency components are outside the smaller bandwidth, the noise immunity
of the system improves.
ii) Adjusting value of fd, adequate phase margin and the stability of the system is assured.
Disadvantage:
i) The only disadvantage of the method is that the bandwidth reduces drastically, as
mentioned earlier.

2. Pole – Zero Compensation:

Consider the same op-amp described by the open loop gain A with three break frequencies as

In this method, the transfer function A is modified by adding a vin pole and a zero with the
help of compensating network. The zero added is at higher frequency while a pole is at lower
frequency. Such a compensating network is shown in the Fig.

The transfer function of the compensating network is say A1.

A1 = Vo / V’o
The values of R1 , R2 and C2 are so selected that the break frequency for the zero matches
with the first corner frequency f1 of the uncompensated system. While the pole of the
compensating network at fo is selected in such a way that the compensated transfer function
A' passes through 0 dB at the second comer frequency f2 of the uncompensated system. The
resultant loop gain becomes A' = AA1

The first corner frequency is now fo and the gain starts rolling off at -20 dB/decade at f o. At f
= f1 there is pole-zero cancellation and rolling rate continues as -20 dB/decade. The values of
R1, R2 and C2 are selected such that plot passes through 0 dB at f 2 i.e., ωgc = f2. The response
for f2 uncompensated and and compensated system is shown in the Fig.

As compared to the dominant pole compensation there is improvement in the bandwidth,

equal to f2 - f1. This is the additional advantage of pole-zero compensation technique.
The value of compensation capacitor is generally very large. Hence it is not possible to build
such capacitor into standard integrated circuits. Generally, the connections are brought out
from IC to connect the compensation elements externally.
Op-amp Internal Compensation:
Recently in op-amps like IC 741, the compensation is provided internally, which is generally
built in lag compensation.
A capacitor ranging from 10 to 30 pF is fabricated between input and output stage to achieve
the necessary compensation. This type of compensation is called Miller effect compensation.
Such op-amps are called compensated op-amps.
Miller Effect Compensation
The main drawback of dominant pole compensation is the reduction in the bandwidth.
Similarly, the value of capacitance required in this method is very large and fabricating such
large capacitance on the chip is not practicable.
These drawbacks are avoided by using Miller effect compensation, using the Miller effect. In
dominant pole compensation, a capacitor is connected to ground from the output terminal but
in Miller effect compensation it is connected in the feedback path of the Darlington pair used
in the output stage of op-amp. This is shown in the Fig.

The Cc is the compensating capacitor; Ri is the input resistance and Ro is the output resistance
of the Darlington stage. The gain of the Darlington stage is given by,
a2 = - Gmc Ro
Where Gmc = Transconductance of the stage
Looking through the input terminal Cc appears as the Miller capacitance CM and from the
results of Miller effect we can write,
Thus effectively Cc gets multiplied by (1 + a2) where a2 is the gain of the stage which is large,
as viewed through the input terminals. Thus practically small C c values can be used, which is
helpful from monolithic fabrication point of view.
This Miller equivalent capacitance CM forms a low pass RC section with input resistance
Ri whose comer frequency is given by,
fd = 1/ 2πCMRi

In addition to the multiplying the capacitance, Miller effect has another advantage. It causes
rearrangement of original poles and cause Pole splitting. This means due to Miller effect
compensation, f1 gets lowered while f2 gets raised. Thus poles get diverged. This increases
the bandwidth compared to dominant pole compensation.
Key Point The Miller effect compensation is simplest and most commonly used for internally
compensated op-amps.
Such compensated op-amps usually have single break frequency and are inherently stable in
nature irrespective of value of closed loop gain. External compensating network is not
required for such op-amps.
Some internally compensated op-amps are Fairchild's µA 741, National semiconductor's LM
107, LM 741, LM 112 and Motorola's MC 1858.

4.Slew rate:
Slew Rate (S) of an op-amp is defined as:
The maximum rate of change of the output voltage per unit time.
It represents how fast the output of the op-amp can respond to a rapid change in the input
signal.
Units: Volts per microsecond (V/μs)
The circuit used for slew rate measurement is shown in the figure below
  The Slew rate of the op-amp can limit the performance of a circuit and it can distort
the output waveform if its limit is exceeded.
 Op-amps may have different slew rates for positive and negative transitions because
of the circuit configuration.
 Ideally, the slew rate should be infinite. However, practical devices like the IC 741 op-
amp have a slew rate of only about 0.5 V/µs, limiting its use in high-frequency
applications.

The input and slew limited output voltage waveform

Slew rate equation:
Consider unity gain op-amp circuit with purely sinusoidal input. The output must be same as
input.

The equation has maximum value when cos ωt = 1.

S = Vm ω = 2π fVm
S = 2π fVm V/sec
Applications of slew rate:
  High-Frequency Amplifiers
 Audio Power Amplifiers
 Pulse and Digital Signal Processing
 Oscilloscope Probe Amplifiers
 Medical Electronics
 Data Acquisition Systems
 Comparator and Zero-Crossing Detectors
5.CMRR:

 A high CMRR means the op-amp is better at amplifying only the difference between
input voltages and ignoring noise or interference that appears equally on both inputs.
 Crucial in applications like sensor signal conditioning, instrumentation, and data
acquisition, where noise rejection is essential. Ideal Op-Amp: CMRR → ∞ (infinite)
Practical Op-Amp: CMRR ranges from 70 dB to 120 dB, depending on design and
precision.

6. Power Supply Rejection Ratio (PSRR):

Definition:
The Power Supply Rejection Ratio (PSRR) is defined as the ratio of the change in input offset
voltage due to the change in supply voltage producing it, keeping other power supply voltage
constant. It is also called Power Supply Sensitivity (PSV).

Now if VEE is constant and due to certain change in VCC, there is change in input offset
voltage then PSRR is defined as,
PSRR = ∆ Vios / ∆ VCC
For a fixed VCC, if there is a change in VEE then
PSRR = ∆ Vios / ∆ VEE |constant VCC
As input offset voltage is very small, PSRR is expressed in mV/V or µV/V. The typical value
of PSRR for IC 741 op-amp is 30 µV/V.
DC Characteristics of op-amp:
The DC characteristics of an operational amplifier (op-amp) describe its behavior when
operating with constant (DC) input voltages. These characteristics are crucial for
understanding how an op-amp will perform in various circuit applications.
1. Input bias current
2. Input offset current
3. Input offset voltage
4. Thermal drift
1. Input Bias current:
Def:
It is defined as the average of two input bias currents IB+ & IB- are flowing into the inverting
and non- inverting terminals of the op-amp.

a. Input bias currents b. Inverting amplifier with bias currents

 If input voltage Vi = 0V. The output Voltage Vo should also be (Vo = 0) but for IB =
500nA We find that the output voltage is offset by Op-amp with a 1M feedback
resistor
 Vo = 500nA X 1M = 500mV
 The output is driven to 500mV with zero input, because of the bias currents.
 In application where the signal levels are measured in mV, this is totally unacceptable.
This can be compensated by a compensation resistor Rcomp has been added between
the non-inverting input terminal and ground as shown in the figure below
 Fig. Bias compensated circuit in non-inverting amplifier
Current IB+ flowing through the compensating resistor Rcomp, then by KVL we get,
- V1+0+V2-Vo = 0 (or)
Vo = V2 – V1 --------- (1)
By selecting proper value of Rcomp, V2 can be cancelled with V1 and the Vo = 0. The
value of Rcomp is derived as
V1 = IB+Rcomp (or)
IB+ = V1/Rcomp ------------------------ (2)
The node ‘a’ is at voltage (-V1). Because the voltage at the non-inverting input
terminal is (-V1).
So with Vi = 0 we get,
I1 = V1/R1 ------------------------ (3)
I2 = V2/Rf ------------------------ (4)
For compensation, Vo should equal to zero (Vo = 0, Vi = 0). i.e. from equation (3)
V2 = V1. So that,
I2 = V1/Rf ——> (5)
KCL at node ‘a’ gives,
IB- = I2 + I1 =( V1/Rf ) +(V1/R1) = V1(R1+Rf)/R1Rf ------------------------ (5)
Assume IB- = IB+ and using equation (2) & (5) we get
V1 (R1+Rf)/R1Rf = V1/Rcomp
Rcomp = R1 || Rf ------------------------ (6)
i.e. to compensate for bias current, the compensating resistor, Rcomp should be equal
to the parallel combination of resistor R1 and Rf.
2. Input offset current:
Def: The input offset current of an operational amplifier (op-amp) is the difference between
the currents flowing into the inverting and non-inverting input terminals when the output
voltage is zero
|Ios| = IB+- IB
i. Bias current compensation will work if both bias currents IB+ and IB- are equal.
ii. Since the input transistor cannot be made identical. There will always be some small
difference between IB+ and IB-. This difference is called the offset current.

3.Input offset voltage:

Def: The op-amp input offset voltage (VIOS) is the DC voltage that must be applied between
the input terminals of an op-amp to force its output to zero volts when no input signal is
present.
In an ideal op-amp, this voltage would be zero, but in real op-amps, component mismatches
cause a non-zero offset voltage. This offset voltage is a DC error that can cause deviations in
the output voltage, even when the input is zero.

4.Thermal drift:
Def: Thermal drift in an operational amplifier (op-amp) refers to the change in the op-amp's
characteristics due to temperature variations. This can affect parameters like input offset
voltage, input bias current, open-loop gain, and bandwidth, potentially causing errors or
malfunctions in circuits.