Unit 2:
OPERATIONAL
AMPLIFIERS
LOGO
OP AMP Specifications- DC OFFSET PARAMETERS
Input Offset Voltage, VIO
-is the differential DC voltage required between the inputs of an amplifier, especially
an operational amplifier, to make the output zero (0 volts with respect to ground, or
between differential outputs if they exist, for voltage amplifiers).
Example page 692
Calculate the output offset voltage of the circuit of the circuit in the figure below. The op-amp
specification lists VIO=1.2mV.
150kΩ
2kΩ
OUTPUT OFFSET VOLTAGE DUE TO INPUT OFFSET CURRENT, I IO
An output offset voltage will result due to any difference in dc bias currents at both inputs.
Since the two input transistors are never exactly matched, each will operate at a slightly
different current.
Example page 693
Calculate the offset voltage for the circuit below for op-amp specification listing I IO=100nA.
150kΩ
2kΩ
TOTAL OFFSET DUE TO VIO AND IIO
Example page 693
Calculate the total offset voltage for the circuit shown below for an op amp with
specified values of input offset voltage, VIO= 4mV and input offset current
IIO=150nA.
INPUT BIAS CURRENT, IIB
Example page 694
Calculate the input bias currents at each input of an op-amp having specified
values of IIO=5nA and IIB= 30 nA.
OP-AMP SPECIFICATIONS- FREQUENCY PARAMETERS
Op-amp is designed to be a high-gain, wide-bandwidth amplifier.
This operation tends to be unstable (oscillate) due to positive feedback.
To ensure stable operation, op-amps are built with internal
compensation circuitry which also causes the very high open-loop gain
to diminish with increasing frequency.
This gain reduction is called roll-off.
Gain-Bandwidth
B1= unity-gain bandwidth
AVD= voltage differential gain
f1=unity gain frequency
fc=cutoff frequency
Gain-Bandwidth Product
(Unity Gain Frequency)
where:
f1 = unity gain frequency
AVD = voltage differential gain
fc = cutoff frequency
Example page 696
Determine the cutoff frequency of an op-amp having specified values B1= 1 MHz
and AVD= 200 V/mV.
Common Mode Rejection Ratio (CMRR)
-it measures the tendency of the device to reject input signals common to
both input leads.
A high CMRR is important in applications where the signal of interest is
represented by a small voltage fluctuation superimposed on a (possibly
large) voltage offset, or when relevant information is contained in the
voltage difference between two signals.
Ad 1 Vc
CMRR Vo Ad Vd 1
Ac CMRR Vd
A Vd Vi Vi
CMRR(log) 20 log10 d 1 2
Ac
Vc
1
Vi Vi
2 1 2
where:
Ad=differential gain of the amplifier
Ac=common-mode gain of the amplifier
Vd=difference voltage
Vc=common voltage
Example page 680
Calculate the CMRR for the circuit measurements shown below.
(a) Differential-mode
(b) Common-mode
Example page 681
Determine the output voltage of an op-amp for input voltages of V i =150µV and Vi =140µV.
1 2
The amplifier has a differential gain of Ad=4000 and the value of CMRR is:
(a) 100
(b) 105
Slew Rate
-is the maximum rate at which amplifier output can change in volts per
microsecond (V/µs).
Vo
SR V / s with t in μs
t
It provides a parameter specifying the maximum rate of change of the
output voltage when driven by a large step-input signal.
The output would not be an amplified duplicate of the input signal if the op-
amp slew rate is exceeded.
Example page 696
For an op-amp having a slew rate of SR= 2V/µs, what is the maximum closed-loop
voltage gain that can be used when the input signal varies by 0.5 V in 10µs?
Note that Vo=ACLVi , where ACL is the closed loop gain.
Maximum Signal Frequency
-it may operate at depends on both the bandwidth (BW) and slew rate (SR)
parameters of the op-amp.
vo K sin( 2ft )
Maximum voltage rate of change:
signal maximum rate of change 2fK V /s
To prevent distortion at the output, the rate of change must also be less than
the slew rate:
2fK SR
K SR
SR
f Hz
2K
SR
rad / s
K
Example page
697
For the signal and circuit of the figure below, determine the maximum frequency
that may be used. Op-amp slew rate is SR=0.5 V/µs.
240kΩ
10kΩ
Vi
(0.02V, ω=300x103) Vo
Comparators
Compares a signal voltage on one input of an op-amp with a
known voltage called the reference voltage on the other input.
The output being digital represents whether the input voltage
exceeded the reference voltage.
The output stays at a high voltage level when noninverting (+)
input is greater than the voltage at the inverting (-) input and
switches to a lower voltage level when the noninverting input
voltage goes below the inverting input voltage.
Output is + or – saturation voltage.
Used for digital interfacing, Schmitt triggers, voltage-level
detectors and oscillators.
(a) Basic Unit (b) Typical Application
Operation of 741 op-amp as comparator
Vi
Vo
+Vsat
-Vsat
Use of op-amp as comparator
Zero-Crossing Detector
Also called sine-wave-to-square wave
converter
Principle of operation
Same as basic comparator but Vref set
to zero
Zero Crossing Detector Using a 311 IC
Schmitt Trigger Rom=R1//R2
Inverting comparator with positive feedback
Vin
Also called as Squaring circuit
Principle of operation
Vut/Vlt
Input voltage triggers output every time it RL
R2
exceeds voltage levels Vut (upper threshold R1
voltage and Vlt (lower threshold voltage).
Example:
If R1=100Ω, R2=56kΩ, vin=1V peak-to-peak sinewave and the op-amp type is
741 with supply voltages= ±15V. Determine the threshold voltages Vut and Vlt
and draw the output waveform.
Note: For 741, the maximum output voltage swing is ±14V.
Rom=R1//R2
Vin
Vut/Vlt
RL
R2
R1
Voltage Regulator
-is an electrical regulator designed to automatically maintain a constant voltage
level.
Two Types of Transistor Voltage Regulators
1. Series Voltage Regulator
Principle of Operation
If the output voltage increases, the comparator circuit provides a control signal to
cause the series control element to decrease the amount of the output voltage-
thereby maintaining the output voltage.
If the output voltage decreases, the comparator circuit provides a control signal to
cause the series control element to increase the amount of the output voltage.
Series Regulator Circuit
If the output voltage decreases, the increased base-emitter voltage
causes transistor Q1 to conduct more, thereby raising the output
voltage—maintaining the output constant.
If the output voltage increases, the decreased base-emitter voltage
causes transistor Q1 to conduct less, thereby reducing the output
voltage—maintaining the output constant.
Example page 869
Calculate the output voltage and Zener current in the regulator circuit shown
below for RL =1 kΩ.
IMPROVED SERIES REGULATOR
Q1
Vi V0
(unregulated R4 (regulated
voltage) voltage)
R1
- VZ + RL
Q2 R R2
Vo 1
R2
VZ VBE 2
VBE2 R3 V2 R2
Resistors R1 and R2 act as a sampling circuit, Zener diode D Z providing a reference voltage,
and transistor Q2 then controls the base current to transistor Q 1 to vary the current passed by
transistor Q1 to maintain the output voltage constant.
If the output voltage tries to increase, the increased voltage sampled by R 1 and R2,
increased voltage V2, causes the base-emitter voltage of transistor Q 2 to go up (since VZ
remains fixed).
If Q2 conducts more current, less goes to the base of transistor Q 1, which then passes less
current to the load, reducing the output voltage— thereby maintaining the output voltage
constant.
The opposite takes place if the output voltage tries to decrease, causing less current to be
supplied to the load, to keep the voltage from decreasing.
Example page 870
What regulated output voltage is provided by the circuit shown below for
the following circuit elements: R1 =20 kΩ, R2 =30 kΩ, and VZ =8.3 V?
Q1
Vi V0
(unregulated R4 (regulated
voltage) voltage)
R1
- VZ + RL
Q2
VBE R3 V2 R2
2
OP- AMP SERIES REGULATOR
The op-amp compares the Zener diode reference voltage with the feedback voltage
from sensing resistors R1 and R2.
If the output voltage varies, the conduction of transistor Q 1 is controlled to
maintain the output voltage constant.
R1
Vo
1
VZ
R2
Example page 871
Calculate the regulated output voltage in the circuit shown below.
Vi = 36V
1kΩ
30kΩ
6.2V
10kΩ
2. SHUNT VOLTAGE REGULATION
A shunt voltage regulator provides regulation by shunting current away from the load to
regulate the output voltage. The input unregulated voltage provides current to the load.
Some of the current is pulled away by the control element to maintain the regulated
output voltage across the load.
If the load voltage tries to change due to a change in the load, the sampling circuit
provides a feedback signal to a comparator, which then provides a control signal to vary
the amount of the current shunted away from the load.
As the output voltage tries to get larger, for example, the sampling circuit provides a
feedback signal to the comparator circuit, which then provides a control signal to draw
increased shunt current, providing less load current, thereby keeping the regulated
voltage from rising.
BASIC TRANSISTOR SHUNT REGULATOR
VL= VZ + VBE
Resistor RS drops the unregulated voltage by an amount that depends on the
current supplied to the load, RL.
The voltage across the load is set by the Zener diode and transistor base-
emitter voltage. If the load resistance decreases, a reduced drive current to the
base of Q1 results, shunting less collector current.
The load current is thus larger, thereby maintaining the regulated voltage
across the load.
Example: Page 873
Determine the regulated voltage and circuit currents for the shunt regulator
below.
IMPROVED SHUNT REGULATOR
The Zener diode provides a reference voltage so that the voltage across R1
senses the output voltage.
As the output voltage tries to change, the current shunted by transistor Q1 is
varied to maintain the output voltage constant.
Transistor Q2 provides a larger base current to transistor Q1 than the circuit of
transistor shunt voltage regulator, so that the regulator handles a larger load
current.
Vo=VL=VZ + VBE + VBE
2 1
SHUNT VOLTAGE REGULATOR USING OP-AMP
The Zener voltage is compared to the feedback voltage obtained from
voltage divider R1 and R2 to provide the control drive current to shunt
element Q1.
The current through resistor RS is thus controlled to drop a voltage across RS
so that the output voltage is maintained.
